#if defined(JAZZ) && defined(R4000) /*++ Copyright (c) 1990 Microsoft Corporation Module Name: fw4trap.s Abstract: This module contains the fw exception handling functions. Author: Lluis Abello (lluis) 4-Sep-91 --*/ // // include header file // #include #include .data // // Declare the table where to store the processor registers. // also align it so that we can store doubles. // .align 4 ALTERNATE_ENTRY(RegisterTable) .space RegisterTableSize ALTERNATE_ENTRY(EndRegisterTable) .text .set noat .set noreorder SBTTL("User TLB dispatcher") /*++ Routine Description: This routine gets control on a User TLB Miss exception. It reads the TLB Miss handler address from the System Parameter Block and jumps to it. Arguments: None. Return Value: None. --*/ LEAF_ENTRY(FwTbMissStartAddress) li k0,KSEG0_BASE lw k0,0x1018(k0)// Load address of UTLB handler nop jal k1,k0 // jump to handler saving return nop // address in k1 mtc0 k0,epc // Handler returns return address in K0 nop // 2 cycle hazard nop // eret // restore from exception nop ALTERNATE_ENTRY(FwTbMissEndAddress) .end FwTbMissStartAddress SBTTL("General Exception dispatcher") /*++ Routine Description: This routine gets control on a General exception. It reads the General exception handler address from the System Parameter Block and jumps to it. Arguments: None. Return Value: None. --*/ LEAF_ENTRY(FwGeneralExceptionStartAddress) li k0,KSEG0_BASE lw k0,0x1014(k0)// Load address of GE handler nop jal k1,k0 // jump to handler saving return nop // address in k1 mtc0 k0,epc // Handler returns return address in K0 nop // 2 cycle hazard nop // eret // restore from exception nop ALTERNATE_ENTRY(FwGeneralExceptionEndAddress) .end FwGeneralExceptionStartAddress SBTTL("CacheError Exception dispatcher") /*++ Routine Description: This routine gets control on a cache error exception. It jumps to the Monitor exception handler. It gets copied to address 0xA0000100 Arguments: None. Return Value: None. --*/ LEAF_ENTRY(FwCacheErrorExceptionStartAddress) la k0,CacheExceptionMonitorEntry // load address of Monitor entry li k1,KSEG1_BASE // convert address to non cached or k0,k0,k1 // j k0 nop ALTERNATE_ENTRY(FwCacheErrorExceptionEndAddress) .end FwCacheErrorExceptionStartAddress SBTTL("Firmware Exception intialize") /*++ Routine Description: This routine copies the User TLB dispatcher and the General Exception dispatcher to the R4000 vector addresses. Arguments: None. Return Value: None. --*/ // // Copy the TB miss and general exception dispatchers to low memory. // NESTED_ENTRY(FwExceptionInitialize,4, zero) subu sp,sp,4 // decrement stack pointer sw ra,0(sp) // save ra la t2,FwTbMissStartAddress // get user TB miss start address la t3,FwTbMissEndAddress // get user TB miss end address li t4,KSEG1_BASE // get copy address 10: lw t5,0(t2) // copy code to low memory addu t2,t2,4 // advance copy pointers sw t5,0(t4) // bne t2,t3,10b // if ne, more to copy addu t4,t4,4 // la t2,FwGeneralExceptionStartAddress // get general exception start address la t3,FwGeneralExceptionEndAddress // get general exception end address li t4,KSEG1_BASE + 0x180 // get copy address 20: lw t5,0(t2) // copy code to low memory addu t2,t2,4 // advance copy pointers sw t5,0(t4) // bne t2,t3,20b // if ne, more to copy addu t4,t4,4 // la t2,FwCacheErrorExceptionStartAddress // get cache error exception start address la t3,FwCacheErrorExceptionEndAddress // get cache error exception end address li t4,KSEG1_BASE + 0x100 // get copy address 30: lw t5,0(t2) // copy code to low memory addu t2,t2,4 // advance copy pointers sw t5,0(t4) // bne t2,t3,30b // if ne, more to copy addu t4,t4,4 // // // Set the Monitor exception handler address in the vector. // li t0,KSEG0_BASE la t1,FwExceptionHandler sw t1,0x1014(t0) // Init GE vector sw t1,0x1018(t0) // Init UTLB vector jal HalSweepIcache // sweep the instruction cache nop jal HalSweepDcache // sweep the data cache nop // // Clear the BEV in the psr and enable IO device interrupts // li t0,(1<