From 3aa8b644a921020beb91109f284ae86dc2f7e189 Mon Sep 17 00:00:00 2001 From: FernandoS27 Date: Fri, 19 Oct 2018 12:17:02 -0400 Subject: Assert Control Flow Instructions using Control Codes --- src/video_core/engines/shader_bytecode.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/video_core/engines/shader_bytecode.h') diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 141b9159b..55763332e 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -1232,6 +1232,7 @@ union Instruction { BitField<60, 1, u64> is_b_gpr; BitField<59, 1, u64> is_c_gpr; BitField<20, 24, s64> smem_imm; + BitField<0, 5, ControlCode> flow_control_code; Attribute attribute; Sampler sampler; @@ -1658,4 +1659,4 @@ private: } }; -} // namespace Tegra::Shader \ No newline at end of file +} // namespace Tegra::Shader -- cgit v1.2.3 From 5bb80ab009a0ee070c4e2caefb6795ef9a28e355 Mon Sep 17 00:00:00 2001 From: FernandoS27 Date: Fri, 19 Oct 2018 16:54:13 -0400 Subject: Assert Control Codes Generation --- src/video_core/engines/shader_bytecode.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/video_core/engines/shader_bytecode.h') diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 141b9159b..b09ea3318 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -578,6 +578,10 @@ union Instruction { BitField<55, 1, u64> saturate; } fmul32; + union { + BitField<52, 1, u64> generates_cc; + } op_32; + union { BitField<48, 1, u64> is_signed; } shift; @@ -1658,4 +1662,4 @@ private: } }; -} // namespace Tegra::Shader \ No newline at end of file +} // namespace Tegra::Shader -- cgit v1.2.3