From 752659aef3f16111981a097989dd7a5ddecff316 Mon Sep 17 00:00:00 2001
From: Kelebek1 <eeeedddccc@hotmail.co.uk>
Date: Fri, 12 Aug 2022 10:58:09 +0100
Subject: Update 3D regs

---
 src/video_core/shader_cache.cpp | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

(limited to 'src/video_core/shader_cache.cpp')

diff --git a/src/video_core/shader_cache.cpp b/src/video_core/shader_cache.cpp
index f53066579..d9482371b 100644
--- a/src/video_core/shader_cache.cpp
+++ b/src/video_core/shader_cache.cpp
@@ -43,14 +43,14 @@ bool ShaderCache::RefreshStages(std::array<u64, 6>& unique_hashes) {
     }
     dirty[VideoCommon::Dirty::Shaders] = false;
 
-    const GPUVAddr base_addr{maxwell3d->regs.code_address.CodeAddress()};
+    const GPUVAddr base_addr{maxwell3d->regs.program_region.Address()};
     for (size_t index = 0; index < Tegra::Engines::Maxwell3D::Regs::MaxShaderProgram; ++index) {
         if (!maxwell3d->regs.IsShaderConfigEnabled(index)) {
             unique_hashes[index] = 0;
             continue;
         }
-        const auto& shader_config{maxwell3d->regs.shader_config[index]};
-        const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderProgram>(index)};
+        const auto& shader_config{maxwell3d->regs.pipelines[index]};
+        const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderType>(index)};
         const GPUVAddr shader_addr{base_addr + shader_config.offset};
         const std::optional<VAddr> cpu_shader_addr{gpu_memory->GpuToCpuAddress(shader_addr)};
         if (!cpu_shader_addr) {
@@ -90,14 +90,14 @@ const ShaderInfo* ShaderCache::ComputeShader() {
 void ShaderCache::GetGraphicsEnvironments(GraphicsEnvironments& result,
                                           const std::array<u64, NUM_PROGRAMS>& unique_hashes) {
     size_t env_index{};
-    const GPUVAddr base_addr{maxwell3d->regs.code_address.CodeAddress()};
+    const GPUVAddr base_addr{maxwell3d->regs.program_region.Address()};
     for (size_t index = 0; index < NUM_PROGRAMS; ++index) {
         if (unique_hashes[index] == 0) {
             continue;
         }
-        const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderProgram>(index)};
+        const auto program{static_cast<Tegra::Engines::Maxwell3D::Regs::ShaderType>(index)};
         auto& env{result.envs[index]};
-        const u32 start_address{maxwell3d->regs.shader_config[index].offset};
+        const u32 start_address{maxwell3d->regs.pipelines[index].offset};
         env = GraphicsEnvironment{*maxwell3d, *gpu_memory, program, base_addr, start_address};
         env.SetCachedSize(shader_infos[index]->size_bytes);
         result.env_ptrs[env_index++] = &env;
-- 
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