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author | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
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committer | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
commit | e611b132f9b8abe35b362e5870b74bce94a1e58e (patch) | |
tree | a5781d2ec0e085eeca33cf350cf878f2efea6fe5 /private/ntos/miniport/always/33c93s.h | |
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Diffstat (limited to 'private/ntos/miniport/always/33c93s.h')
-rw-r--r-- | private/ntos/miniport/always/33c93s.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/private/ntos/miniport/always/33c93s.h b/private/ntos/miniport/always/33c93s.h new file mode 100644 index 000000000..3cafe0cbb --- /dev/null +++ b/private/ntos/miniport/always/33c93s.h @@ -0,0 +1,26 @@ +/* Copyright (C) 1991, 1992 by Always Technology Corporation. + This module contains information proprietary to + Always Technology Corporation, and is be treated as confidential. +*/ + +#ifndef __33C93S_H__ +#define __33C93S_H__ + +#define USES33C93 + +struct WD33C93S { + + IOHandle WDSelPort; /* IO address of select/status register */ + IOHandle WDDataPort; /* IO address on this board for data port */ + + U8 MHz; /* Ext. clock freq. */ + U8 IFreq; /* Internal freq (X-clock/clock divisor) */ + U8 AsyncValue; /* Board sync. xfer value for async xfers */ + U8 State; + U8 MI_Temp; /* Temp holding register for received msgs */ + U8 TID; /* Target ID of reselection */ + + }; + + +#endif /* __33C93S_H__ */ |