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| author | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
|---|---|---|
| committer | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
| commit | e611b132f9b8abe35b362e5870b74bce94a1e58e (patch) | |
| tree | a5781d2ec0e085eeca33cf350cf878f2efea6fe5 /private/ntos/ndis/madge/driver/head_def | |
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Diffstat (limited to 'private/ntos/ndis/madge/driver/head_def')
21 files changed, 5519 insertions, 0 deletions
diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_adap.h b/private/ntos/ndis/madge/driver/head_def/ftk_adap.h new file mode 100644 index 000000000..b5f982bc7 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_adap.h @@ -0,0 +1,280 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE ADAPTER DEFINITIONS */ +/* ======================= */ +/* */ +/* FTK_ADAP.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for the structure which is */ +/* used to maintain information on an adapter that is being used by the */ +/* FTK. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_ADAP.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_ADAP_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_ADAPTER ADAPTER; + + +/****************************************************************************/ +/* */ +/* Structure type : ADAPTER */ +/* */ +/* The adapter structure is used to maintain all the information for a */ +/* single adapter. This includes information on the Fastmac for the */ +/* adapter. Most of the fields are filled in from the user supplied adapter */ +/* information to driver_prepare_adapter and driver_start_adapter. */ +/* */ + +struct STRUCT_ADAPTER + { + void (*set_dio_address) (struct STRUCT_ADAPTER*, DWORD); + void (*interrupt_handler) (struct STRUCT_ADAPTER*); + void (*remove_card) (struct STRUCT_ADAPTER*); + UINT adapter_card_bus_type; + UINT adapter_card_type; + UINT adapter_card_revision; + UINT adapter_ram_size; /* Depends on card type. */ +#ifdef PCMCIA_POINT_ENABLE + UINT socket; /* Socket passed to point + enabler. */ + BOOLEAN drop_int; /* Flag used to stop a + spurious interrupt being + claimed. */ +#endif + WORD io_location; + WORD io_range; + WORD interrupt_number; /* 0 == Polling mode */ + WBOOLEAN edge_triggered_ints; + WORD nselout_bits; /* IRQ select on Smart16 */ + WORD dma_channel; + UINT transfer_mode; /* DMA/MMIO/PIO */ + WBOOLEAN EaglePsDMA; + WORD mc32_config; /* special config info */ + NODE_ADDRESS permanent_address; /* BIA PROM node address */ + UINT ring_speed; + WBOOLEAN speed_detect; /* Card is capable of detecting ring speed */ + WORD max_frame_size; /* determined by ring speed */ + UINT set_ring_speed; /* Force ring speed to this */ + DWORD mmio_base_address; /* MMIO base address */ + DWORD pci_handle; /* PCI slot handle. */ + WBOOLEAN use_32bit_pio; + WORD sif_dat; /* SIF register IO locations*/ + WORD sif_datinc; + WORD sif_adr; + WORD sif_int; + WORD sif_acl; + WORD sif_adr2; + WORD sif_adx; + WORD sif_dmalen; + WORD sif_sdmadat; + WORD sif_sdmaadr; + WORD sif_sdmaadx; + WORD c46_bits; /* Bits we must remember in */ + /* the AT93C46 control reg. */ + + + WBOOLEAN set_irq; /* set IRQ if possible */ + WBOOLEAN set_dma; /* set DMA if possible */ + + SRB_GENERAL srb_general; /* SRB for this adapter */ + WORD size_of_srb; /* size of current SRB */ + + DOWNLOAD_IMAGE * download_image; /* ptr Fastmac binary image */ + INITIALIZATION_BLOCK * init_block; /* ptr Fastmac init block */ + SRB_HEADER * srb_dio_addr; /* addr of SRB in DIO space */ + FASTMAC_STATUS_BLOCK * stb_dio_addr; /* addr of STB in DIO space */ + + WBOOLEAN interrupts_on; /* for this adapter */ + WBOOLEAN dma_on; /* for this adapter */ + + UINT adapter_status; /* prepared or running */ + UINT srb_status; /* free or in use */ + ERROR_RECORD error_record; /* error type and value */ + ERROR_MESSAGE error_message; /* error message string */ + + STATUS_INFORMATION * status_info; /* ptr adapter status info */ + + void * user_information; /* User's private data. */ + + ADAPTER_HANDLE adapter_handle; + +#ifdef FMPLUS + + DWORD dma_test_buf_phys; + DWORD dma_test_buf_virt; + + + RX_SLOT * rx_slot_array[FMPLUS_MAX_RX_SLOTS]; + /* Rx slot DIO addresses */ + TX_SLOT * tx_slot_array[FMPLUS_MAX_TX_SLOTS]; + /* Tx slot DIO addresses */ + + void * rx_slot_mgmnt; /* pointer to user slot */ + void * tx_slot_mgmnt; /* management structures. */ + +#else + + DWORD rx_buffer_phys; /* RX buffer physical address*/ + DWORD rx_buffer_virt; /* RX buffer virtual address */ + DWORD tx_buffer_phys; /* TX buffer physical address*/ + DWORD tx_buffer_virt; /* TX buffer virtual address */ + +#endif + }; + + +/****************************************************************************/ +/* */ +/* Values : ADAPTER - WORD adapter_card_type */ +/* */ +/* The following are the different types of adapter cards supported by the */ +/* FTK (and their subtypes). */ +/* */ + +#define ADAPTER_CARD_TYPE_16_4_AT 2 + +#define ADAPTER_CARD_16_4_PC 0 +#define ADAPTER_CARD_16_4_MAXY 1 +#define ADAPTER_CARD_16_4_AT 2 +#define ADAPTER_CARD_16_4_FIBRE 3 +#define ADAPTER_CARD_16_4_BRIDGE 4 +#define ADAPTER_CARD_16_4_ISA_C 5 +#define ADAPTER_CARD_16_4_AT_P_REV 6 +#define ADAPTER_CARD_16_4_FIBRE_P 7 +#define ADAPTER_CARD_16_4_ISA_C_P 8 +#define ADAPTER_CARD_16_4_AT_P 9 + +#define ADAPTER_CARD_TYPE_16_4_MC 3 + +#define ADAPTER_CARD_TYPE_16_4_MC_32 4 + +#define ADAPTER_CARD_TYPE_16_4_EISA 5 + +#define ADAPTER_CARD_16_4_EISA_MK1 1 +#define ADAPTER_CARD_16_4_EISA_MK2 2 +#define ADAPTER_CARD_16_4_EISA_BRIDGE 3 +#define ADAPTER_CARD_16_4_EISA_MK3 4 + +#define ADAPTER_CARD_TYPE_SMART_16 6 +#define ADAPTER_CARD_SMART_16 1 + +#define ADAPTER_CARD_TYPE_16_4_PCI 7 +#define ADAPTER_CARD_16_4_PCI 0 + +#define ADAPTER_CARD_TYPE_16_4_PCMCIA 8 +#define ADAPTER_CARD_16_4_PCMCIA 1 + +#define ADAPTER_CARD_TYPE_16_4_PNP 9 +#define ADAPTER_CARD_PNP 0 + +#define ADAPTER_CARD_TYPE_16_4_PCIT 10 +#define ADAPTER_CARD_16_4_PCIT 0 + +#define ADAPTER_CARD_TYPE_16_4_PCI2 11 +#define ADAPTER_CARD_16_4_PCI2 0 + +#define ADAPTER_CARD_UNKNOWN 255 + +/****************************************************************************/ +/* */ +/* Values : ADAPTER - WORD adapter_status */ +/* */ +/* These values are for the different required states of the adapter when */ +/* using the FTK. */ +/* */ + +#define ADAPTER_PREPARED_FOR_START 0 +#define ADAPTER_RUNNING 1 + + +/****************************************************************************/ +/* */ +/* Values : ADAPTER - WORD srb_status */ +/* */ +/* These values are for the different required states of the SRB, */ +/* associated with an adapter, when using the FTK. */ +/* */ + +#define SRB_ANY_STATE 0 +#define SRB_FREE 1 +#define SRB_NOT_FREE 2 + + +/****************************************************************************/ +/* */ +/* Value : Number of Adapters supported */ +/* */ +/* The FTK supports a specified maximum number of adapters. The smaller */ +/* this value is, the less memory that is used. This is especially true */ +/* when considering system specific parts such as the DOS example code */ +/* within this FTK. It uses the maximum number of adapters value for */ +/* determining the size of static arrays of adapter structures and */ +/* initialization blocks. It also uses it for determining the number of */ +/* interrupt stubs required given that : */ +/* */ +/* NOTE : If using the DOS example system specific code, then it must be */ +/* the case that MAX_NUMBER_OF_ADAPTERS defined here equals */ +/* MAX_NUMBER_OF_ADAPTERS as defined in SYS_IRQ.ASM. */ +/* */ + +#define MAX_NUMBER_OF_ADAPTERS 8 + + +#define ISA_IO_LOCATIONS 4 +#define MAX_ISA_ADAPATERS ISA_IO_LOCATIONS + +#define MC_IO_LOCATIONS 8 +#define MAX_MC_ADAPATERS MC_IO_LOCATIONS + +#define MC32_IO_LOCATIONS 8 +#define MAX_MC32_ADAPATERS MC32_IO_LOCATIONS + + +/****************************************************************************/ +/* */ +/* Varaibles : adapter_record array */ +/* */ +/* The FTK maintains an array of pointers to the adapter structures used to */ +/* maintain information on the different adapters being used. This array is */ +/* exported by DRV_INIT.C. */ +/* */ + +extern ADAPTER * adapter_record[MAX_NUMBER_OF_ADAPTERS]; + +/****************************************************************************/ +/* */ +/* Macro: FTK_ADAPTER_USER_INFORMATION */ +/* */ +/* A macro to let FTK users get at their private adapter information from */ +/* an adapter handle. */ +/* */ + +#define FTK_ADAPTER_USER_INFORMATION(adapter_handle) \ + (adapter_record[(adapter_handle)]->user_information) + + +/* */ +/* */ +/************** End of FTK_ADAP.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_at.h b/private/ntos/ndis/madge/driver/head_def/ftk_at.h new file mode 100644 index 000000000..45d6c4345 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_at.h @@ -0,0 +1,234 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (ATULA CARDS) */ +/* ================================================ */ +/* */ +/* FTK_AT.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge ATULA */ +/* adapter cards. Each adapter card has a number of control and status */ +/* registers. ALL bits in ALL registers are defined by Madge Networks Ltd, */ +/* however only a restricted number are defined below as used within the */ +/* FTK. All other bits must NOT be changed and no support will be offered */ +/* for any application that does so or uses the defined bits in any way */ +/* different to the FTK. */ +/* */ +/* Note: The ATULA is Madge Network's name for the ASIC on its 16/4 AT and */ +/* 16/4 PC adapter cards. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_AT.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_AT_H 221 + + +/****************************************************************************/ +/* */ +/* Values : ATULA REGISTER MAP */ +/* */ +/* Madge 16/4 AT and 16/4 PC adapter cards both use the ATULA and hence */ +/* have the following register map. By setting certain bits in the control */ +/* registers it is possible to page in a) the status register or the PIO */ +/* address registers, b) the BIA PROM (page 0 or page 1) or the EAGLE SIF */ +/* registers (normal or extended). */ +/* */ +/* NB. There is a lot of similarity between the ATULA and MC register maps. */ +/* */ + +#define ATULA_IO_RANGE 32 + +#define ATULA_CONTROL_REGISTER_1 1 +#define ATULA_CONTROL_REGISTER_2 2 +#define ATULA_STATUS_REGISTER 3 +#define ATULA_CONTROL_REGISTER_6 6 +#define ATULA_CONTROL_REGISTER_7 7 + +#define ATULA_FIRST_SIF_REGISTER 8 + +#define ATULA_BIA_PROM 8 + +#define ATULA_PIO_ADDRESS_LOW_REGISTER 3 +#define ATULA_PIO_ADDRESS_MID_REGISTER 4 +#define ATULA_PIO_ADDRESS_HIGH_REGISTER 5 + +#define AT_P_EISA_REV2_CTRL_REG 21 +#define AT_P_SW_CONFIG_REG 22 + +/****************************************************************************/ +/* */ +/* Values : ATULA CONTROL_REGISTER_1 */ +/* */ +/* These are the bit definitions for control register 1 on ATULA cards. */ +/* */ +/* NB. The bit definitions are mostly the same as MC CONTROL_REGISTER_1. */ +/* */ + +#define ATULA_CTRL1_SINTREN ((BYTE) 0x01) /* SIF interrupt enable */ +#define ATULA_CTRL1_NSRESET ((BYTE) 0x04) /* active low SIF reset */ +#define ATULA_CTRL1_SRSX ((BYTE) 0x40) /* SIF extended register select */ +#define ATULA_CTRL1_4_16_SEL ((BYTE) 0x80) /* Select 4 or 16 Mb/s */ + + +/****************************************************************************/ +/* */ +/* Values : ATULA CONTROL_REGISTER_2 BITS */ +/* */ +/* These are the bit definitions for control register 2 on ATULA cards. */ +/* */ + +#define ATULA_CTRL2_CS16DLY ((BYTE) 0x01) /* 1=REV3, 0=REV4 bus timings */ +#define ATULA_CTRL2_ADDSEL ((BYTE) 0x04) /* page in PIO addr regs (PIO) */ +#define ATULA_CTRL2_SHRQEN ((BYTE) 0x10) /* SHRQ enable (PIO) */ +#define ATULA_CTRL2_INTEN ((BYTE) 0x20) /* overall interrupt enable */ +#define ATULA_CTRL2_SHRQ ((BYTE) 0x40) /* SHRQ pin status (PIO) */ +#define ATULA_CTRL2_SHLDA ((BYTE) 0x80) /* SHLDA pin status (PIO) */ + + +/****************************************************************************/ +/* */ +/* Values : ATULA CONTROL_REGISTER_6 BITS */ +/* */ +/* These are the bit definitions for control register 6 on ATULA cards. */ +/* */ + +#define ATULA_CTRL6_MODES ((BYTE) 0x03) /* transfer mode (2 bits) */ +#define ATULA_CTRL6_UDRQ ((BYTE) 0x04) /* user generate DMA request */ +#define ATULA_CTRL6_DMAEN ((BYTE) 0x08) /* enable DMA */ +#define ATULA_CTRL6_CLKSEL ((BYTE) 0xC0) /* clock speed select (2 bits) */ + + +/****************************************************************************/ +/* */ +/* Values : ATULA CONTROL_REGISTER_7 */ +/* */ +/* These are the bit definitions for control register 7 on ATULA cards. */ +/* */ +/* NB. The bit definitions are mostly the same as MC CONTROL_REGISTER_0. */ +/* */ + +#define ATULA_CTRL7_SIFSEL ((BYTE) 0x04) /* page in BIA PROM or SIF regs */ +#define ATULA_CTRL7_PAGE ((BYTE) 0x08) /* pages BIA PROM or EEPROM */ +#define ATULA_CTRL7_UINT ((BYTE) 0x10) /* user generate interrupt */ +#define ATULA_CTRL7_SINTR ((BYTE) 0x40) /* SIF interrupt pending */ +#define ATULA_CTRL7_REV_4 ((BYTE) 0x80) /* 1=REV4, 0=REV3 mode */ + + +/****************************************************************************/ +/* */ +/* Values : ATULA STATUS_REGISTER BITS */ +/* */ +/* These are the bit definitions for the status register on ATULA cards. */ +/* */ + +#define ATULA_STATUS_SDDIR ((BYTE) 0x10) /* data xfer direction (PIO) */ +#define ATULA_STATUS_ASYN_BUS ((BYTE) 0x20) /* asynchronous bus */ +#define ATULA_STATUS_BUS8 ((BYTE) 0x40) /* 8 bit slot */ + + +/****************************************************************************/ +/* */ +/* Values : MODE IN ATULA CONTROL_REGISTER_6 */ +/* */ +/* The two mode select bits in control register 6 (ATULA_CTRL6_MODES) are */ +/* configured for the data transfer mode being used. */ +/* */ + +#define ATULA_CTRL6_MODE_BUS_MASTER ((BYTE) 0x03) /* bus master DMA mode */ +#define ATULA_CTRL6_MODE_PIO ((BYTE) 0x00) /* PIO mode */ + + +/****************************************************************************/ +/* */ +/* Values : CLOCK SPEED IN ATULA CONTROL_REGISTER_6 */ +/* */ +/* The two SIF clock speed select bits in control register 6 */ +/* (ATULA_CTRL6_CLKSEL) are configured for either on-board (8MHz) or host */ +/* oscillator frequency. */ +/* */ + +#define ATULA_CTRL6_CLKSEL_HOST ((BYTE) 0xC0) /* host bus */ +#define ATULA_CTRL6_CLKSEL_ON_BOARD ((BYTE) 0x00) /* 8Mhz on board */ + + +/****************************************************************************/ +/* */ +/* Values : FIELDS IN THE AT_P_EISA_REV2_CTRL REGISTER */ +/* */ +/* These bit masks define bit fields within the AT/P control register. */ +/* */ + +#define ATP_RSCTRL ((BYTE) 0x08) +#define ATP_CLKDIV ((BYTE) 0x10) + + +/****************************************************************************/ +/* */ +/* Values : FIELDS IN THE AT_P_SW_CONFIG REGISTER */ +/* */ +/* These bit masks define bit fields within the AT/P control register. */ +/* */ + +#define ATP_INTSEL0 ((BYTE) 0x01) +#define ATP_INTSEL1 ((BYTE) 0x02) +#define ATP_INTSEL2 ((BYTE) 0x04) +#define ATP_INTSEL ((BYTE) 0x07) + +#define ATP_DMA0 ((BYTE) 0x08) +#define ATP_DMA1 ((BYTE) 0x10) +#define ATP_DMA ((BYTE) 0x18) + +#define ATP_S4N16 ((BYTE) 0x40) + +/****************************************************************************/ +/* */ +/* Value : PIO IO LOCATION */ +/* */ +/* The IO location used during PIO for reading/writing data from/to the */ +/* adapter card is mapped on top of the EAGLE SIFDAT register in the ATULA */ +/* card register map. */ +/* */ + +#define ATULA_PIO_IO_LOC 0 + + +/****************************************************************************/ +/* */ +/* Values : ATULA EXTENDED EAGLE SIF REGISTERS */ +/* */ +/* The EAGLE SIF registers are in two groups - the normal SIF registers */ +/* (those from the old TI chipset) and the extended SIF registers (those */ +/* particular to the EAGLE). For Madge ATULA adapter cards, with */ +/* CTRL7_SIFSEL = 1 and CTRL1_NRESET = 1, having CTRL1_SRSX = 0 selects the */ +/* normal SIF registers and having CTRL1_SRSX = 1 selects the extended SIF */ +/* registers. */ +/* */ +/* The definitions for the normal SIF registers are in FTK_CARD.H because */ +/* they appear in the same relative IO locations for all adapter cards. The */ +/* extended SIF registers are here because they appear at different */ +/* relative IO locations for different types of adapter cards. For ATULA */ +/* and MC cards they are in fact identical. */ +/* */ + +#define ATULA_EAGLE_SIFACL 0 /* adapter control */ +#define ATULA_EAGLE_SIFADR_2 2 /* copy of SIFADR */ +#define ATULA_EAGLE_SIFADX 4 /* DIO address (high) */ +#define ATULA_EAGLE_DMALEN 6 /* DMA length */ + + +/* */ +/* */ +/************** End of FTK_AT.H file ****************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_card.h b/private/ntos/ndis/madge/driver/head_def/ftk_card.h new file mode 100644 index 000000000..02c4e4ef0 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_card.h @@ -0,0 +1,341 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE ADAPTER CARD DEFINITIONS : EAGLE (TMS 380 2nd GEN) */ +/* ====================================================== */ +/* */ +/* FTK_CARD.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions specific to the TI EAGLE (TMS */ +/* 380 2nd generation) chipset and the bring-up, initialization and opening */ +/* of the adapter. It also contains the details of the BIA PROM on ATULA */ +/* and MC cards. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_CARD.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_CARD_H 221 + + +/****************************************************************************/ +/* */ +/* Values : EAGLE SIF REGISTERS */ +/* */ +/* The EAGLE SIF registers are in two groups - the normal SIF registers */ +/* (those from the old TI chipset) and the extended SIF registers (those */ +/* particular to the EAGLE). */ +/* */ +/* The definitions for the normal SIF registers are here because they */ +/* appear in the same relative IO locations for all adapter cards. The */ +/* definitions for the extended SIF registers are in the FTK_<card_type>.H */ +/* files. */ +/* */ + +#define EAGLE_SIFDAT 0 /* DIO data */ +#define EAGLE_SIFDAT_INC 2 /* DIO data auto-increment */ +#define EAGLE_SIFADR 4 /* DIO address (low) */ +#define EAGLE_SIFINT 6 /* interrupt SIFCMD-SIFSTS */ + +/* These definitions are for the case when the SIF registers are mapped */ +/* linearly. Otherwise, they will be at some extended location. */ + +#define EAGLE_SIFACL 8 +#define EAGLE_SIFADX 12 + +/* These definitions are for Eagle Pseudo DMA. Notice that they replace the */ +/* registers above - this is controlled by SIFACL. */ + +#define EAGLE_SDMADAT 0 +#define EAGLE_DMALEN 2 +#define EAGLE_SDMAADR 4 +#define EAGLE_SDMAADX 6 + +/****************************************************************************/ +/* */ +/* Value : Number of IO locations for SIF registers */ +/* */ +/* The number of SIF registers is only needed for enabling and disabling */ +/* ranges of IO ports. For the ATULA and MC cards the SIF registers are in */ +/* 2 pages only using 8 IO ports. However, for EISA cards, the SIF */ +/* registers are in a single page of 16 IO ports. Hence, 16 IO ports need */ +/* to be enabled whenever accessing SIF registers. */ +/* */ + +#define SIF_IO_RANGE 16 + +/****************************************************************************/ +/* */ +/* Value : Number of IO locations for adapter cards */ +/* */ +/* The maximum IO range required for the register map of any type of */ +/* adapter card is that used by the EISA card. The ATULA based cards have */ +/* the largest contiguous IO range, however. The EISA range is split into */ +/* two, the upper range only being used during installation. */ +/* */ + +#define MAX_CARD_IO_RANGE ATULA_IO_RANGE + + +/****************************************************************************/ +/* */ +/* Values : MAX FRAME SIZES SUPPORTED */ +/* */ +/* Depending on the ring speed (4 Mbit/s or 16 Mbit/s) different maximum */ +/* frame sizes are supported as defined in the ISO standards. The ISO */ +/* standards give the maximum size of the information field to which has to */ +/* added the MAC header, SR info fields etc. to give real maximum token */ +/* ring frame size. */ +/* */ + +#define MAC_FRAME_SIZE 39 + +#define MIN_FRAME_SIZE (256 + MAC_FRAME_SIZE) +#define MAX_FRAME_SIZE_4_MBITS (4472 + MAC_FRAME_SIZE) +#define MAX_FRAME_SIZE_16_MBITS (17800 + MAC_FRAME_SIZE) + + +/****************************************************************************/ +/* */ +/* Values : EAGLE ADAPTER CONTROL (SIFACL) REGISTER BITS */ +/* */ +/* The bits in the EAGLE extended SIF register EAGLE_SIFACL can be used for */ +/* general controlling of the adapter card. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-18 4.3.1 SIFACL - SIF Adapter Control Register */ +/* */ + +#define EAGLE_SIFACL_SWHLDA 0x0800 /* for EAGLE pseudo-DMA */ +#define EAGLE_SIFACL_SWDDIR 0x0400 /* data transfer direction */ +#define EAGLE_SIFACL_SWHRQ 0x0200 /* DMA pending */ +#define EAGLE_SIFACL_PSDMAEN 0x0100 /* for EAGLE pseudo-DMA */ +#define EAGLE_SIFACL_ARESET 0x0080 /* adapter reset */ +#define EAGLE_SIFACL_CPHALT 0x0040 /* halt EAGLE */ +#define EAGLE_SIFACL_BOOT 0x0020 /* bootstrap */ +#define EAGLE_SIFACL_RESERVED1 0x0010 /* reserved */ +#define EAGLE_SIFACL_SINTEN 0x0008 /* system interrupt enable */ +#define EAGLE_SIFACL_PARITY 0x0004 /* adapter parity enable */ +#define EAGLE_SIFACL_INPUT0 0x0002 /* reserved */ +#define EAGLE_SIFACL_RESERVED2 0x0001 /* reserved */ + + +/****************************************************************************/ +/* */ +/* Values : DIO LOCATIONS */ +/* */ +/* When initializing an adapter the initialization block must be downloaded */ +/* to location 0x00010A00L in DIO space. */ +/* */ +/* The ring speed, from which the maximum frame size is deduced, can be */ +/* determined by the value in the ring speed register at DIO address 0x0142 */ +/* in the EAGLE DATA page 0x00010000. */ +/* */ + +#define DIO_LOCATION_INIT_BLOCK 0x00010A00L + +#define DIO_LOCATION_EAGLE_DATA_PAGE 0x00010000L +#define DIO_LOCATION_RING_SPEED_REG 0x0142 + +#define RING_SPEED_REG_4_MBITS_MASK 0x0400 + +#define DIO_LOCATION_EXT_DMA_ADDR 0x010E +#define DIO_LOCATION_DMA_ADDR 0x0110 + +#define DIO_LOCATION_DMA_CONTROL 0x100A + +/****************************************************************************/ +/* */ +/* Values : EAGLE BRING UP INTERRUPT REGISTER VALUES */ +/* */ +/* The code produced at the SIFSTS part of the SIF interrupt register at */ +/* bring up time indicates the success or failure of the bring up. The */ +/* success or failure is determined by looking at the top nibble. On */ +/* success, the INITIALIZE bit is set. On failure, the TEST and ERROR bits */ +/* are set and the error code is in the bottom nibble. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-40 4.5 Bring-Up Diagnostics - BUD */ +/* */ + +#define EAGLE_SIFINT_SYSTEM (UINT) 0x0080 + +#define EAGLE_BRING_UP_TOP_NIBBLE (BYTE) 0xF0 +#define EAGLE_BRING_UP_BOTTOM_NIBBLE (BYTE) 0x0F + +#define EAGLE_BRING_UP_SUCCESS (BYTE) 0x40 +#define EAGLE_BRING_UP_FAILURE (BYTE) 0x30 + + +/****************************************************************************/ +/* */ +/* Values : EAGLE INITIALIZATION INTERRUPT REGISTER VALUES */ +/* */ +/* The code 0x9080 is output to the SIF interrupt register in order to */ +/* start the initialization process. The code produced at the SIFSTS part */ +/* of the SIF interrupt register at initialization time indicates the */ +/* success or failure of the initialization. On success, the INITIALIZE, */ +/* TEST and ERROR bits are all zero. On failure, the ERROR bit is set and */ +/* the error code is in the bottom nibble. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-46 4.6.2 Writing The Initialization Block */ +/* */ + +#define EAGLE_INIT_START_CODE 0x9080 + +#define EAGLE_INIT_TOP_NIBBLE (BYTE) 0xF0 +#define EAGLE_INIT_BOTTOM_NIBBLE (BYTE) 0x0F + +#define EAGLE_INIT_SUCCESS_MASK (BYTE) 0x70 +#define EAGLE_INIT_FAILURE_MASK (BYTE) 0x10 + + +/****************************************************************************/ +/* */ +/* Values : SCB and SSB test patterns */ +/* */ +/* As a result of initialization, certain test patterns should be left in */ +/* the SSB and SCB as pointed to by the TI initialization parameters. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-46 4.6.2 Writing The Initialization Block */ +/* */ + +#define SSB_TEST_PATTERN_LENGTH 8 +#define SSB_TEST_PATTERN_DATA {0xFF,0xFF,0xD1,0xD7,0xC5,0xD9,0xC3,0xD4} + +#define SCB_TEST_PATTERN_LENGTH 6 +#define SCB_TEST_PATTERN_DATA {0x00,0x00,0xC1,0xE2,0xD4,0x8B} + + +/****************************************************************************/ +/* */ +/* Value : EAGLE ARB FREE CODE - written to the EAGLE interrupt register to */ +/* indicate that the ARB is now free for use by the adapter. This */ +/* is of most use at start time when combined with the DELAY_RX */ +/* FEATURE FLAG. This code can be used to enable receives. */ + +#define EAGLE_ARB_FREE_CODE 0x90FF + + +/****************************************************************************/ +/* */ +/* Values : EAGLE OPENING ERRORS */ +/* */ +/* On opening the adapter, the success or failure is recorded in the */ +/* open_error field of the Fastmac status parameter block. The bottom byte */ +/* has the error value on failure. On success, the word is clear. The open */ +/* error is that which would be given by a MAC 0003 OPEN command. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-80 MAC 0003 OPEN command */ +/* */ + +#define EAGLE_OPEN_ERROR_BOTTOM_BYTE 0x00FF + +#define EAGLE_OPEN_ERROR_SUCCESS 0x0000 + + +/****************************************************************************/ +/* */ +/* Values : BIA PROM FORMAT */ +/* */ +/* The BIA PROM is accessed in 2 pages. With CTRLn_SIFSEL = 0 (n=7 for */ +/* ATULA cards, n=0 for MC cards) or CTRL1_NRESET = 0, the bit CTRLn_PAGE */ +/* selects the different pages. With CTRLn_PAGE = 0, the id and board type */ +/* are available; with CTRLn_PAGE = 1, the node address is available. */ +/* */ + +#define BIA_PROM_ID_BYTE 0 +#define BIA_PROM_ADAPTER_BYTE 1 +#define BIA_PROM_REVISION_BYTE 2 +#define BIA_PROM_FEATURES_BYTE 3 +#define BIA_PROM_HWF2 4 +#define BIA_PROM_HWF3 5 + +#define BIA_PROM_NODE_ADDRESS 1 + +/****************************************************************************/ +/* */ +/* Values : Bits defined in the HW flags */ +/* */ +/* HWF2 */ +#define C30 0x1 + +/* HWF3 */ +#define RSPEED_DETECT 0x80 + + +/****************************************************************************/ +/* */ +/* Values : BIA PROM ADAPTER CARD TYPES */ +/* */ +/* The second byte in the first page of the BIA PROM contains an adapter */ +/* card type. */ +/* */ + +#define BIA_PROM_TYPE_16_4_AT ((BYTE) 0x04) +#define BIA_PROM_TYPE_16_4_MC ((BYTE) 0x08) +#define BIA_PROM_TYPE_16_4_PC ((BYTE) 0x0B) +#define BIA_PROM_TYPE_16_4_MAXY ((BYTE) 0x0C) +#define BIA_PROM_TYPE_16_4_MC_32 ((BYTE) 0x0D) +#define BIA_PROM_TYPE_16_4_AT_P ((BYTE) 0x0E) + +#define MAX_ADAPTER_CARD_AT_REV 6 + + +/****************************************************************************/ +/* */ +/* Values : BIA PROM FEATURES BYTE MASKS (and related values) */ +/* */ +/* The features byte in the BIA indicates certain hardware characteristics */ +/* of AT/P cards (and later cards). */ +/* Note that you can multiply the masked DRAM field by the DRAM_MULT value */ +/* to get the amount of RAM on the card (don't shift the field). */ +/* */ + +#define BIA_PROM_FEATURE_SRA_MASK ((BYTE) 0x01) +#define BIA_PROM_FEATURE_DRAM_MASK ((BYTE) 0x3E) +#define BIA_PROM_FEATURE_CLKDIV_MASK ((BYTE) 0x40) + +#define DRAM_MULT 64 + + +/****************************************************************************/ +/* */ +/* Values : MADGE ADAPTER CARD NODE ADDRESSES */ +/* */ +/* The first 3 bytes of the permanent node address for Madge adapter cards */ +/* must have certain values. All Madge node addresses are of the form */ +/* 0000F6xxxxxx. */ +/* */ + +#define MADGE_NODE_BYTE_0 ((BYTE) 0x00) +#define MADGE_NODE_BYTE_1 ((BYTE) 0x00) +#define MADGE_NODE_BYTE_2 ((BYTE) 0xF6) + + +/* */ +/* */ +/************** End of FTK_CARD.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_defs.h b/private/ntos/ndis/madge/driver/head_def/ftk_defs.h new file mode 100644 index 000000000..e5271ea61 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_defs.h @@ -0,0 +1,52 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE FTK DEFINITIONS */ +/* =================== */ +/* */ +/* FTK_DEFS.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file includes all the definition header files used by the */ +/* FTK. The header files are included in an order such that all */ +/* dependenices between files are satisfied. */ +/* */ +/* IMPORTANT : All structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +#include "user.h" +#include "ftk_user.h" +#include "ftk_down.h" +#include "ftk_init.h" +#include "ftk_at.h" +#include "ftk_sm16.h" +#include "ftk_pci.h" +#include "ftk_pcit.h" +#include "ftk_pci2.h" +#include "ftk_pcmc.h" +#include "ftk_eisa.h" +#include "ftk_mc.h" +#include "ftk_pnp.h" +#include "ftk_card.h" +#include "ftk_fm.h" +#include "ftk_err.h" +#include "ftk_srb.h" +#include "ftk_adap.h" +#include "ftk_macr.h" +#include "ftk_poke.h" + +/* */ +/* */ +/************** End of FTK_DEFS.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_down.h b/private/ntos/ndis/madge/driver/head_def/ftk_down.h new file mode 100644 index 000000000..7ea825141 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_down.h @@ -0,0 +1,128 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE DOWNLOAD DEFINITIONS */ +/* ======================== */ +/* */ +/* FTK_DOWN.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for the structure which is */ +/* used for downloading information on to an adapter that is being used by */ +/* the FTK. */ +/* */ +/* REFERENCE : The Madge Smart SRB Interface */ +/* - Downloading The Code */ +/* */ +/* IMPORTANT : All structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +#pragma pack(1) + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_DOWN.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_DOWN_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_DOWNLOAD_RECORD DOWNLOAD_RECORD; + +/****************************************************************************/ +/* */ +/* Structure type : DOWNLOAD_RECORD */ +/* */ +/* This structure gives the format of the records that define how data is */ +/* downloaded into adapter DIO space. There are only 3 types of record that */ +/* are used on EAGLEs when downloading. These are MODULE - a special record */ +/* that starts a download image, DATA_32 - null terminated data with DIO */ +/* start address location, and FILL_32 - pattern with length to be filled */ +/* in starting at given DIO location. */ +/* */ +/* Each download record is an array of words in Intel byte ordering (ie. */ +/* least significant byte first). */ +/* */ +/* REFERENCE : The Madge Smart SRB Interface */ +/* - Downloading The Code */ +/* */ + +struct STRUCT_DOWNLOAD_RECORD + { + WORD length; /* length of entire record */ + WORD type; /* type of record */ + union + { + struct /* MODULE */ + { + WORD reserved_1; + WORD download_features; + WORD reserved_2; + WORD reserved_3; + WORD reserved_4; + BYTE name[1]; /* '\0' ending module name */ + } module; + + struct /* DATA_32 */ + { + DWORD dio_addr; /* 32 bit EAGLE address */ + WORD word_count; /* number of words */ + WORD data[1]; /* null terminated data */ + } data_32; + + struct /* FILL_32 */ + { + DWORD dio_addr; /* 32 bit EAGLE address */ + WORD word_count; /* number of words */ + WORD pattern; /* value to fill */ + } fill_32; + + } body; + + }; + +/****************************************************************************/ +/* */ +/* Values : DOWNLOAD_RECORD - WORD type */ +/* */ +/* These values are for the different types of download record. */ +/* */ + +#define DOWNLOAD_RECORD_TYPE_DATA_32 0x04 +#define DOWNLOAD_RECORD_TYPE_FILL_32 0x05 +#define DOWNLOAD_RECORD_TYPE_MODULE 0x12 + + +/****************************************************************************/ +/* */ +/* Values : DOWNLOAD_RECORD - module. WORD download_features */ +/* */ +/* These specify some features of the module to be downloaded that may be */ +/* checked for. */ +/* */ + +#define DOWNLOAD_FASTMAC_INTERFACE 0x0011 +#define DOWNLOAD_BMIC_SUPPORT 0x4000 /* required for EISA cards */ + +#pragma pack() + +/* */ +/* */ +/************** End of FTK_DOWN.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_eisa.h b/private/ntos/ndis/madge/driver/head_def/ftk_eisa.h new file mode 100644 index 000000000..8845363c5 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_eisa.h @@ -0,0 +1,132 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (EISA CARDS) */ +/* =============================================== */ +/* */ +/* FTK_EISA.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge EISA */ +/* adapter cards. Each adapter card has a number of control and status */ +/* registers. ALL bits in ALL registers are defined by Madge Networks Ltd, */ +/* however only a restricted number are defined below as used within the */ +/* FTK. All other bits must NOT be changed and no support will be offered */ +/* for any application that does so or uses the defined bits in any way */ +/* different to the FTK. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_EISA.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_EISA_H 221 + + +/****************************************************************************/ +/* */ +/* Values : EISA REGISTER MAP */ +/* */ +/* Madge EISA cards have the following register map. All SIF registers are */ +/* always visible. */ +/* */ +/* NB. The IO registers are actually in two groups 0x0000-0x000F (the SIF */ +/* registers) and 0x0C80-0x00C9F (the control type registers). */ +/* */ + +#define EISA_IO_RANGE 16 + +#define EISA_FIRST_SIF_REGISTER 0x0000 + +#define EISA_IO_RANGE2 32 + +#define EISA_IO_RANGE2_BASE 0x0C80 + +#define EISA_ID_REGISTER_0 0x0C80 +#define EISA_ID_REGISTER_1 0x0C82 +#define EISA_CONTROLX_REGISTER 0x0C84 + +#define EISA_BMIC_REGISTER_3 0x0C90 + + +/****************************************************************************/ +/* */ +/* Values : MC POS_REGISTER_0 */ +/* */ +/* These are the required contents of the EISA ID registers for Madge 16/4 */ +/* EISA mk1 and mk2 cards. */ +/* */ + +#define EISA_ID0_MDG_CODE 0x8734 /* 'MDG' encoded */ + +#define EISA_ID1_MK1_MDG_CODE 0x0100 /* '0001' encoded */ +#define EISA_ID1_MK2_MDG_CODE 0x0200 /* '0002' encoded */ +#define EISA_ID1_BRIDGE_MDG_CODE 0x0300 /* '0003' encoded */ +#define EISA_ID1_MK3_MDG_CODE 0x0400 /* '0004' encoded */ + + +/****************************************************************************/ +/* */ +/* Values : EISA CONTROLX_REGISTER */ +/* */ +/* These are the bit definitions for the expansion board control register */ +/* on EISA cards. */ +/* */ + +#define EISA_CTRLX_CDEN ((BYTE) 0x01) /* card enabled */ + + +/****************************************************************************/ +/* */ +/* Values : EISA BMIC_REGISTER_3 */ +/* */ +/* These are the bit definitions for BMIC register 3 on EISA cards. */ +/* */ + +#define EISA_BMIC3_IRQSEL ((BYTE) 0x0F) /* interrupt number (4 bits) */ +#define EISA_BMIC3_EDGE ((BYTE) 0x10) /* edge\level triggered ints */ +#define EISA_BMIC3_SPD ((BYTE) 0x80) /* any speed selected */ + + +/****************************************************************************/ +/* */ +/* Values : EISA EXTENDED EAGLE SIF REGISTERS */ +/* */ +/* The EAGLE SIF registers are in two groups - the normal SIF registers */ +/* (those from the old TI chipset) and the extended SIF registers (those */ +/* particular to the EAGLE). For Madge EISA adapter cards, both normal and */ +/* extended SIF registers are always accessible. */ +/* */ +/* The definitions for the normal SIF registers are in FTK_CARD.H because */ +/* they appear in the same relative IO locations for all adapter cards. The */ +/* extended SIF registers are here because they appear at different */ +/* relative IO locations for different types of adapter cards. */ +/* */ + +#define EISA_EAGLE_SIFACL 8 /* adapter control */ +#define EISA_EAGLE_SIFADR_2 10 /* copy of SIFADR */ +#define EISA_EAGLE_SIFADX 12 /* DIO address (high) */ +#define EISA_EAGLE_DMALEN 14 /* DMA length */ + + +/****************************************************************************/ +/* */ +/* Values : VRAM enable on EIDA Mk3 */ +/* */ + +#define DIO_LOCATION_EISA_VRAM_ENABLE ((DWORD) 0xC0000L) +#define EISA_VRAM_ENABLE_WORD ((WORD) 0xFFFF) + +/* */ +/* */ +/************** End of FTK_EISA.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_err.h b/private/ntos/ndis/madge/driver/head_def/ftk_err.h new file mode 100644 index 000000000..595460bb5 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_err.h @@ -0,0 +1,389 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE ERROR DEFINITIONS */ +/* ===================== */ +/* */ +/* FTK_ERR.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the structures associated with error handling */ +/* and all the possible error codes (types and values) produced by the FTK. */ +/* */ +/* A string of text describing each of the possible error codes (type and */ +/* value) can be found in the error tables in FTK_TAB.H. */ +/* */ +/* IMPORTANT : All structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_ERR.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_ERR_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_ERROR_RECORD ERROR_RECORD; +typedef struct STRUCT_ERROR_MESSAGE ERROR_MESSAGE; +typedef struct STRUCT_ERROR_MESSAGE_RECORD ERROR_MESSAGE_RECORD; + + +/****************************************************************************/ +/* */ +/* Structure type : ERROR_MESSAGE_RECORD */ +/* */ +/* The error message tables (see FTK_TAB.H) are made up of elements of this */ +/* structure. Each error message string has associated with it an error */ +/* value of the type of error that the table is for. */ +/* */ + +struct STRUCT_ERROR_MESSAGE_RECORD + { + BYTE value; + char * err_msg_string; + }; + + +/****************************************************************************/ +/* */ +/* Structure type : ERROR_MESSAGE */ +/* */ +/* Associated with an adapter structure is an error message for the last */ +/* error to occur on the adapter. It is filled in by a call to */ +/* driver_explain_error and a pointer to it is returned to the user. */ +/* */ + +#define MAX_ERROR_MESSAGE_LENGTH 600 + +struct STRUCT_ERROR_MESSAGE + { + char string[MAX_ERROR_MESSAGE_LENGTH]; + }; + +/****************************************************************************/ +/* */ +/* Structure type : ERROR_RECORD */ +/* */ +/* This structure is used for recording error information. There is an */ +/* element of this structure, associated with every adapter, that is used */ +/* to record the current error status of the adapter. */ +/* */ + +struct STRUCT_ERROR_RECORD + { + BYTE type; + BYTE value; + }; + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - BYTE type */ +/* */ +/* The following lists the type of errors that can occur. Some of these are */ +/* fatal in that an adapter for which they occur can not subsequently be */ +/* used. The value 0 (zero) is used to indicate no error has yet occured. */ +/* */ + +#define ERROR_TYPE_NONE (BYTE) 0x00 /* no error */ +#define ERROR_TYPE_SRB (BYTE) 0x01 /* non-fatal error */ +#define ERROR_TYPE_OPEN (BYTE) 0x02 /* non-fatal error */ +#define ERROR_TYPE_DATA_XFER (BYTE) 0x03 /* non-fatal error */ +#define ERROR_TYPE_DRIVER (BYTE) 0x04 /* fatal error */ +#define ERROR_TYPE_HWI (BYTE) 0x05 /* fatal error */ +#define ERROR_TYPE_BRING_UP (BYTE) 0x06 /* fatal error */ +#define ERROR_TYPE_INIT (BYTE) 0x07 /* fatal error */ +#define ERROR_TYPE_AUTO_OPEN (BYTE) 0x08 /* fatal error */ +#define ERROR_TYPE_ADAPTER (BYTE) 0x09 /* fatal error */ +#define ERROR_TYPE_CS (BYTE) 0x0A /* fatal error */ + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_SRB . BYTE value */ +/* SRB_HEADER - BYTE return_code */ +/* */ +/* The non-fatal SRB error type uses for error values the return codes in */ +/* the SRB header. For the SRBs that are supported by the FTK there are */ +/* only a limited number of possible error values that can occur. Note */ +/* however, that a failing open adapter SRB call may cause OPEN error type */ +/* errors and not just SRB error type errors (see ERROR_TYPE_OPEN below). */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface */ +/* */ + +#define SRB_E_00_SUCCESS (BYTE) 0x00 +#define SRB_E_03_ADAPTER_OPEN (BYTE) 0x03 +#define SRB_E_04_ADAPTER_CLOSED (BYTE) 0x04 +#define SRB_E_06_INVALID_OPTIONS (BYTE) 0x06 +#define SRB_E_07_CMD_CANCELLED_FAIL (BYTE) 0x07 +#define SRB_E_32_INVALID_NODE_ADDRESS (BYTE) 0x32 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_OPEN . BYTE value */ +/* */ +/* Non-fatal open errors occur when an open adapter SRB returns with code */ +/* SRB_E_07_CMD_CANCELLED_FAILED. In this case the error type is changed to */ +/* ERROR_TYPE_OPEN and the error value is changed to show that an open */ +/* error has occured. The actual open error details are determined when the */ +/* user calls driver_explain_error (see TMS Open Error Codes below). */ +/* */ + +#define OPEN_E_01_OPEN_ERROR (BYTE) 0x01 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_DATA_XFER . BYTE value */ +/* */ +/* There is only one possible non-fatal data transfer error. This occurs on */ +/* an attempted transmit when the Fastmac transmit buffer is full. */ +/* */ + +#define DATA_XFER_E_01_BUFFER_FULL (BYTE) 0x01 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_DRIVER . BYTE value */ +/* */ +/* The DRIVER part of the FTK can generate the following fatal error */ +/* values. These can, for example, be caused by sys_alloc routines failing */ +/* or passing an illegal adapter handle to a driver routine. See FTK_TAB.H */ +/* for more details. */ +/* */ + +#define DRIVER_E_01_INVALID_HANDLE (BYTE) 0x01 +#define DRIVER_E_02_NO_ADAP_STRUCT (BYTE) 0x02 +#define DRIVER_E_03_FAIL_ALLOC_STATUS (BYTE) 0x03 +#define DRIVER_E_04_FAIL_ALLOC_INIT (BYTE) 0x04 +#define DRIVER_E_05_FAIL_ALLOC_RX_BUF (BYTE) 0x05 +#define DRIVER_E_06_FAIL_ALLOC_TX_BUF (BYTE) 0x06 +#define DRIVER_E_07_NOT_PREPARED (BYTE) 0x07 +#define DRIVER_E_08_NOT_RUNNING (BYTE) 0x08 +#define DRIVER_E_09_SRB_NOT_FREE (BYTE) 0x09 +#define DRIVER_E_0A_RX_BUF_BAD_SIZE (BYTE) 0x0A +#define DRIVER_E_0B_RX_BUF_NOT_DWORD (BYTE) 0x0B +#define DRIVER_E_0C_TX_BUF_BAD_SIZE (BYTE) 0x0C +#define DRIVER_E_0D_TX_BUF_NOT_DWORD (BYTE) 0x0D +#define DRIVER_E_0E_BAD_RX_METHOD (BYTE) 0x0E +#define DRIVER_E_0F_WRONG_RX_METHOD (BYTE) 0x0F + +#define DRIVER_E_10_BAD_RX_SLOT_NUMBER (BYTE) 0x10 +#define DRIVER_E_11_BAD_TX_SLOT_NUMBER (BYTE) 0x11 +#define DRIVER_E_12_FAIL_ALLOC_DMA_BUF (BYTE) 0x12 +#define DRIVER_E_13_BAD_FRAME_SIZE (BYTE) 0x13 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_HWI . BYTE value */ +/* */ +/* The HWI part of the FTK can generate the following fatal error values. */ +/* Most of these are caused by the user supplying illegal values to */ +/* driver_start_adapter. See FTK_TAB.H for more details. */ +/* */ + +#define HWI_E_01_BAD_CARD_BUS_TYPE (BYTE) 0x01 +#define HWI_E_02_BAD_IO_LOCATION (BYTE) 0x02 +#define HWI_E_03_BAD_INTERRUPT_NUMBER (BYTE) 0x03 +#define HWI_E_04_BAD_DMA_CHANNEL (BYTE) 0x04 +#define HWI_E_05_ADAPTER_NOT_FOUND (BYTE) 0x05 +#define HWI_E_06_CANNOT_USE_DMA (BYTE) 0x06 +#define HWI_E_07_FAILED_TEST_DMA (BYTE) 0x07 +#define HWI_E_08_BAD_DOWNLOAD (BYTE) 0x08 +#define HWI_E_09_BAD_DOWNLOAD_IMAGE (BYTE) 0x09 +#define HWI_E_0A_NO_DOWNLOAD_IMAGE (BYTE) 0x0A +#define HWI_E_0B_FAIL_IRQ_ENABLE (BYTE) 0x0B +#define HWI_E_0C_FAIL_DMA_ENABLE (BYTE) 0x0C +#define HWI_E_0D_CARD_NOT_ENABLED (BYTE) 0x0D +#define HWI_E_0E_NO_SPEED_SELECTED (BYTE) 0x0E +#define HWI_E_0F_BAD_FASTMAC_INIT (BYTE) 0x0F + +#define HWI_E_10_BAD_TX_RX_BUFF_SIZE (BYTE) 0x10 +#define HWI_E_11_TOO_MANY_TX_RX_BUFFS (BYTE) 0x11 +#define HWI_E_12_BAD_SCB_ALLOC (BYTE) 0x12 +#define HWI_E_13_BAD_SSB_ALLOC (BYTE) 0x13 +#define HWI_E_14_BAD_PCI_MACHINE (BYTE) 0x14 +#define HWI_E_15_BAD_PCI_MEMORY (BYTE) 0x15 +#define HWI_E_16_PCI_3BYTE_PROBLEM (BYTE) 0x16 +#define HWI_E_17_BAD_TRANSFER_MODE (BYTE) 0x17 + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_BRING_UP . BYTE value */ +/* */ +/* During an attempt to perform bring-up of an adapter card, one of a */ +/* number of fatal error values may be produced. Bits 12-15 of the EAGLE */ +/* SIFINT register contain the error value. These codes are used by the FTK */ +/* to distinguish different bring-up errors. An extra error value is used */ +/* for the case when no bring up code is produced within a timeout period */ +/* (3 seconds). */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-40 4.5 Bring-Up Diagnostics - BUD */ +/* */ + +#define BRING_UP_E_00_INITIAL_TEST (BYTE) 0x00 +#define BRING_UP_E_01_SOFTWARE_CHECKSUM (BYTE) 0x01 +#define BRING_UP_E_02_ADAPTER_RAM (BYTE) 0x02 +#define BRING_UP_E_03_INSTRUCTION_TEST (BYTE) 0x03 +#define BRING_UP_E_04_INTERRUPT_TEST (BYTE) 0x04 +#define BRING_UP_E_05_FRONT_END (BYTE) 0x05 +#define BRING_UP_E_06_SIF_REGISTERS (BYTE) 0x06 + +#define BRING_UP_E_10_TIME_OUT (BYTE) 0x10 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_INIT . BYTE value */ +/* */ +/* During an attempt to perform adapter initialization, one of a number of */ +/* fatal error values may be produced. Bits 12-15 of the EAGLE SIFINT */ +/* regsiter contain the error value. These codes are used by the FTK to */ +/* distinguish different initialization errors. An extra error value is */ +/* used for the case when no initialization code is produced within a */ +/* timeout period (11 seconds). */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-47 4.6 Adapter Initialization */ +/* */ + +#define INIT_E_01_INIT_BLOCK (BYTE) 0x01 +#define INIT_E_02_INIT_OPTIONS (BYTE) 0x02 +#define INIT_E_03_RX_BURST_SIZE (BYTE) 0x03 +#define INIT_E_04_TX_BURST_SIZE (BYTE) 0x04 +#define INIT_E_05_DMA_THRESHOLD (BYTE) 0x05 +#define INIT_E_06_ODD_SCB_ADDRESS (BYTE) 0x06 +#define INIT_E_07_ODD_SSB_ADDRESS (BYTE) 0x07 +#define INIT_E_08_DIO_PARITY (BYTE) 0x08 +#define INIT_E_09_DMA_TIMEOUT (BYTE) 0x09 +#define INIT_E_0A_DMA_PARITY (BYTE) 0x0A +#define INIT_E_0B_DMA_BUS (BYTE) 0x0B +#define INIT_E_0C_DMA_DATA (BYTE) 0x0C +#define INIT_E_0D_ADAPTER_CHECK (BYTE) 0x0D +#define INIT_E_0E_NOT_ENOUGH_MEMORY (BYTE) 0x0E + +#define INIT_E_10_TIME_OUT (BYTE) 0x10 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_AUTO_OPEN . BYTE value */ +/* */ +/* Auto-open errors are fatal - there is no chance to try to open the */ +/* adapter again. The error value is usually set to show that an open */ +/* adapter error has occured. The details of the open error are determined */ +/* when the user calls driver_explain_error (see TMS Open Error Codes */ +/* below). There is also an extra error value which is used for the case */ +/* when no open adapter error code is produced within a timeout period (40 */ +/* seconds). */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-79 MAC 0003 OPEN command */ +/* */ + +#define AUTO_OPEN_E_01_OPEN_ERROR (BYTE) 0x01 +#define AUTO_OPEN_E_80_TIME_OUT (BYTE) 0x80 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_ADAPTER . BYTE value */ +/* */ +/* An adapter check interrupt causes an adapter check fatal error. */ +/* Different types of adapter checks are not distinguished by the FTK. */ +/* */ + +#define ADAPTER_E_01_ADAPTER_CHECK (BYTE) 0x01 + + +/****************************************************************************/ +/* */ +/* Values : ERROR_RECORD - ERROR_TYPE_CS . BYTE value */ +/* */ +/* These are possible errors return from calling PCMCIA Card Services. */ +/* These errors can only occur on 16/4 PCMCIA ringnode. Other adapters do */ +/* not make calls to PCMCIA Card Services. To start up a 16/4 PCMCIA */ +/* Ringnode, the driver first registers with PCMCIA Card Services as a */ +/* client, gropes for the ringnode using Card Services calls, requests I/O */ +/* and interrupt resources from Card Services. If any of these operations */ +/* fails, the driver will return following errors. Note that these are */ +/* fatal errors. */ +/* */ + +#define CS_E_01_NO_CARD_SERVICES (BYTE) 0x01 +#define CS_E_02_REGISTER_CLIENT_FAILED (BYTE) 0x02 +#define CS_E_03_REGISTRATION_TIMEOUT (BYTE) 0x03 +#define CS_E_04_NO_MADGE_ADAPTER_FOUND (BYTE) 0x04 +#define CS_E_05_ADAPTER_NOT_FOUND (BYTE) 0x05 +#define CS_E_06_SPECIFIED_SOCKET_IN_USE (BYTE) 0x06 +#define CS_E_07_IO_REQUEST_FAILED (BYTE) 0x07 +#define CS_E_08_BAD_IRQ_CHANNEL (BYTE) 0x08 +#define CS_E_09_IRQ_REQUEST_FAILED (BYTE) 0x09 +#define CS_E_0A_REQUEST_CONFIG_FAILED (BYTE) 0x0A + + +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* Values : TMS Open Error Codes */ +/* */ +/* When an E_01_OPEN_ERROR (either AUTO_OPEN or OPEN) occurs, more details */ +/* of the open adapter error are available by looking at the open_error */ +/* field in the Fastmac status block. This open error is the same as that */ +/* generated by a TI MAC 0003 OPEN command. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-79 MAC 0003 OPEN command */ +/* */ + +#define TMS_OPEN_FAIL_E_40_OPEN_ADDR 0x4000 +#define TMS_OPEN_FAIL_E_02_FAIL_OPEN 0x0200 +#define TMS_OPEN_FAIL_E_01_OPEN_OPTS 0x0100 + +#define TMS_OPEN_PHASE_E_01_LOBE_TEST 0x0010 +#define TMS_OPEN_PHASE_E_02_INSERTION 0x0020 +#define TMS_OPEN_PHASE_E_03_ADDR_VER 0x0030 +#define TMS_OPEN_PHASE_E_04_RING_POLL 0x0040 +#define TMS_OPEN_PHASE_E_05_REQ_INIT 0x0050 + +#define TMS_OPEN_ERR_E_01_FUNC_FAIL 0x0001 +#define TMS_OPEN_ERR_E_02_SIGNAL_LOSS 0x0002 +#define TMS_OPEN_ERR_E_05_TIMEOUT 0x0005 +#define TMS_OPEN_ERR_E_06_RING_FAIL 0x0006 +#define TMS_OPEN_ERR_E_07_BEACONING 0x0007 +#define TMS_OPEN_ERR_E_08_DUPL_ADDR 0x0008 +#define TMS_OPEN_ERR_E_09_REQ_INIT 0x0009 +#define TMS_OPEN_ERR_E_0A_REMOVE 0x000A + + +/* */ +/* */ +/************** End of FTK_ERR.H file ***************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_fm.h b/private/ntos/ndis/madge/driver/head_def/ftk_fm.h new file mode 100644 index 000000000..0d99596df --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_fm.h @@ -0,0 +1,351 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE FASTMAC DEFINITIONS */ +/* ======================= */ +/* */ +/* FTK_FM.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the structures, constants etc., that are */ +/* relevant to Fastmac and its use by the FTK and are not included */ +/* elsewhere. This includes the Fastmac status block structure and the */ +/* Fastmac use of the EAGLE SIFINT register. */ +/* */ +/* IMPORTANT : All structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +#pragma pack(1) + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_FM.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_FM_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_FASTMAC_STATUS_BLOCK FASTMAC_STATUS_BLOCK; +#ifdef FMPLUS +typedef struct STRUCT_RX_SLOT RX_SLOT; +typedef struct STRUCT_TX_SLOT TX_SLOT; +#endif + +/****************************************************************************/ +/* */ +/* Structure type : FASTMAC_STATUS_BLOCK */ +/* */ +/* Fastmac maintains a status block that includes the pointers to the */ +/* receive and transmit buffers, as well as the ring status and a boolean */ +/* flag to say if the adapter is open. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - Status Block */ +/* */ + +struct STRUCT_FASTMAC_STATUS_BLOCK + { + WORD reserved_1; + WORD signature; + WBOOLEAN adapter_open; /* TRUE when open */ + WORD open_error; /* open error code */ + WORD tx_adap_ptr; /* transmit buffer pointers */ + WORD tx_host_ptr; + WORD tx_wrap_ptr; + WORD rx_adap_ptr; /* receive buffer pointers */ + WORD rx_wrap_ptr; + WORD rx_host_ptr; + NODE_ADDRESS permanent_address; /* BIA PROM node address */ + NODE_ADDRESS open_address; /* opening node address */ + WORD tx_dma_count; + WORD timestamp_ptr; + WORD rx_internal_buffer_size; + WORD rx_total_buffers_avail; + WORD rx_buffers_in_use; + WORD rx_frames_lost; + WORD watchdog_timer; + WORD ring_status; /* current ring status */ + WORD tx_discarded; +#ifdef FMPLUS + WORD rx_slot_start; /* where to find rx slots */ + WORD tx_slot_start; /* where to find tx slots */ +#endif + WORD reserved_2[1]; + WORD rxdesc_host_ptr; + DWORD rxdesc_queue[1]; + }; + + +/****************************************************************************/ +/* */ +/* Values : Fastmac buffer sizes */ +/* */ +/* The Fastmac receive and transmit buffers have minimum and maximum */ +/* allowable sizes. The minimum size allows the buffer to contain a single */ +/* 1K frame. */ +/* */ + +#define FASTMAC_MAXIMUM_BUFFER_SIZE 0xFF00 +#define FASTMAC_MINIMUM_BUFFER_SIZE 0x0404 + + +/****************************************************************************/ +/* */ +/* Values : FASTMAC SIF INTERRUPT (SIFCMD-SIFSTS) REGISTER BITS */ +/* */ +/* When Fastmac generates an interrupt (via the SIF interrupt register), */ +/* the value in the register will indicate the reason for the interrupt. */ +/* Also, when the user interrupts Fastmac (again via the SIF interrupt */ +/* register), the value in the register indicates the reason. */ +/* */ +/* REFERENCE : The Madge Smart SRB Interface */ +/* - The Interrupt Register */ +/* */ + +#define DRIVER_SIFINT_IRQ_FASTMAC 0x8000 /* interrupt Fastmac */ + +#define DRIVER_SIFINT_FASTMAC_IRQ_MASK 0x00FF + +#define DRIVER_SIFINT_SSB_FREE 0x4000 +#define DRIVER_SIFINT_SRB_COMMAND 0x2000 +#define DRIVER_SIFINT_ARB_FREE 0x1000 + +#define DRIVER_SIFINT_ACK_SSB_RESPONSE 0x0400 +#define DRIVER_SIFINT_ACK_SRB_FREE 0x0200 +#define DRIVER_SIFINT_ACK_ARB_COMMAND 0x0100 + + +#define FASTMAC_SIFINT_IRQ_DRIVER 0x0080 /* interrupt driver */ + +#define FASTMAC_SIFINT_ADAPTER_CHECK 0x0008 +#define FASTMAC_SIFINT_SSB_RESPONSE 0x0004 +#define FASTMAC_SIFINT_SRB_FREE 0x0002 +#define FASTMAC_SIFINT_ARB_COMMAND 0x0001 + +#define FASTMAC_SIFINT_RECEIVE 0x0000 + + +/****************************************************************************/ +/* */ +/* Values : FASTMAC DIO LOCATIONS */ +/* */ +/* There are certain fixed locations in DIO space containing pointers that */ +/* are accessed by the driver to determine DIO locations where the driver */ +/* must read or store Fastmac information. These pointers identify the */ +/* location of such things as the SRB and status block (STB). The pointers */ +/* are at DIO locations 0x00011000 - 0x00011008. The values defined below */ +/* give the location of the pointers within the EAGLE DATA page 0x00010000. */ +/* */ +/* REFERENCE : The Madge Smart SRB Interface */ +/* - Shared RAM Format */ +/* */ + +#define DIO_LOCATION_SSB_POINTER 0x1000 +#define DIO_LOCATION_SRB_POINTER 0x1002 +#define DIO_LOCATION_ARB_POINTER 0x1004 +#define DIO_LOCATION_STB_POINTER 0x1006 /* status block */ +#define DIO_LOCATION_IPB_POINTER 0x1008 /* init block */ +#define DIO_LOCATION_DMA_CONTROL 0x100A +#define DIO_LOCATION_DMA_POINTER 0x100C + + +/****************************************************************************/ +/* */ +/* Values : Fastmac product id string */ +/* */ +/* The product id string for Fastmac that is used by certain management MAC */ +/* frames. If the Fastmac auto-open feature is used then the product id is */ +/* always "THE MADGE FASTMAC". If an OPEN_ADAPTER SRB then the FTK product */ +/* id is "FTK MADGE FASTMAC". */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Open Adapter SRB */ +/* */ + +#define SIZEOF_PRODUCT_ID 18 +#ifdef FMPLUS +#define FASTMAC_PRODUCT_ID "FTK MADGE FM PLUS" +#else +#define FASTMAC_PRODUCT_ID "FTK MADGE FASTMAC" +#endif + +/****************************************************************************/ +/* */ +/* Global variable : ftk_product_inst_id */ +/* */ +/* Value of the product ID strings set when an open adapter SRB */ +/* is generated. This is set to FASTMAC_PRODUCT_ID in DRV_SRB.C. */ +/* */ + +extern char ftk_product_inst_id[SIZEOF_PRODUCT_ID]; + +/****************************************************************************/ +/* */ +/* Values : Fastmac buffer format */ +/* */ +/* The format in which frames are kept in the Fastmac buffers includes a */ +/* header to the frame containing the length of the entire header and */ +/* frame, and a timestamp. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - The Fastmac Algorithm */ +/* */ + + +#define FASTMAC_BUFFER_HEADER_SIZE 4 + +#define FASTMAC_HEADER_LENGTH_OFFSET 0 +#define FASTMAC_HEADER_STAMP_OFFSET 2 + + +#ifdef FMPLUS +/****************************************************************************/ +/* */ +/* Structure type : RX_SLOT */ +/* */ +/* Fastmac Plus maintains a slot structure on the card for each receive */ +/* buffer on the host. These include the address of the buffer, the length */ +/* of any frame in it, and the receive status of any frame there. When a */ +/* frame is received, Fastmac Plus updates the length and status fields. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Receive Details: Slot Structure */ +/* */ + +struct STRUCT_RX_SLOT + { + WORD buffer_len; + WORD reserved; + WORD buffer_hiw; + WORD buffer_low; + WORD rx_status; + WORD next_slot; + }; + + +/****************************************************************************/ +/* */ +/* Structure type : TX_SLOT */ +/* */ +/* Fastmac Plus maintains a number of slot structures on the card, to allow */ +/* transmit pipelining. Each of these structures includes two fields for */ +/* host buffers and lengths - one is for a small buffer, less than the size */ +/* of a buffer on the adapter card, and the other is for a large buffer, up */ +/* to the maximum frame size. There is also a status field so that the host */ +/* transmit code can monitor the progress of the transmit. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Transmit Details: Slot Structure */ +/* */ + +struct STRUCT_TX_SLOT + { + WORD tx_status; + WORD small_buffer_len; + WORD large_buffer_len; + WORD reserved[2]; + WORD small_buffer_hiw; + WORD small_buffer_low; + WORD next_slot; + WORD large_buffer_hiw; + WORD large_buffer_low; + }; + + +/****************************************************************************/ +/* */ +/* Values : Fastmac Plus min/max slot numbers */ +/* */ +/* Fastmac Plus places certain restrictions on the numbers of transmit and */ +/* receive slots that can be allocated. These constants specify the values. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Initialisation : TMS Load Parms */ +/* */ + +#define FMPLUS_MAX_RX_SLOTS 32 +#define FMPLUS_MIN_RX_SLOTS 2 + +#define FMPLUS_MAX_TX_SLOTS 32 +#define FMPLUS_MIN_TX_SLOTS 2 + + +/****************************************************************************/ +/* */ +/* Values : Fastmac Plus Receive Status Mask */ +/* */ +/* By bitwise AND-ing the mask here with the receive status read from the */ +/* receive slot, code can determine whether the received frame is good or */ +/* not. If the result is zero, the frame is good, otherwise it is a junk */ +/* frame. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Receive Status Processing */ +/* */ + +#define GOOD_RX_FRAME_MASK ((WORD) 0x5E00) + + +/****************************************************************************/ +/* */ +/* Values : Fastmac Plus Transmit Status Mask And Values */ +/* */ +/* By bitwise AND-ing the good frame mask with the transmit status read */ +/* from the receive slot, code can determine whether the frame was */ +/* transmitted properly or not. If more detail is required, the receive */ +/* status mask can be used to check various conditions in the transmitted */ +/* frame when it returned to the adapter. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Transmit Status Processing */ +/* */ + +#define GOOD_TX_FRAME_MASK ((WORD) 0x5F00) +#define GOOD_TX_FRAME_VALUE ((WORD) 0x0100) + +#define TX_RECEIVE_STATUS_MASK ((WORD) 0x0700) +#define TX_RECEIVE_LOST_FRAME ((WORD) 0x0300) +#define TX_RECEIVE_CORRUPT_TOKEN ((WORD) 0x0500) +#define TX_RECEIVE_IMPLICIT_ABORT ((WORD) 0x0700) + + +/****************************************************************************/ +/* */ +/* Values : Fastmac Plus Zero Length Small Buffer value */ +/* */ +/* When transmitting a frame that exists only in a large buffer, a special */ +/* non-zero value must be written to the small buffer length field of the */ +/* receive slot (this is because Fastmac Plus uses zero there to indicate */ +/* that a transmit has completed, and waits for it to change before trying */ +/* to transmit any more from that slot). This special value is defined here.*/ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Transmit Details */ +/* */ + +#define FMPLUS_SBUFF_ZERO_LENGTH ((WORD)(0x8000)) + +#endif + + +#pragma pack() + +/* */ +/* */ +/************** End of FTK_FM.H file ****************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_init.h b/private/ntos/ndis/madge/driver/head_def/ftk_init.h new file mode 100644 index 000000000..491df1e0a --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_init.h @@ -0,0 +1,330 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE INITIALIZATION BLOCK DEFINITIONS */ +/* ==================================== */ +/* */ +/* FTK_INIT.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for the structures that go to */ +/* make the initialization block that is needed in order to initialize an */ +/* adapter card that is in use by the FTK. */ +/* */ +/* IMPORTANT : All structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +#pragma pack(1) + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_INIT.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_INIT_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_INITIALIZATION_BLOCK INITIALIZATION_BLOCK; +typedef struct STRUCT_TI_INIT_PARMS TI_INIT_PARMS; +typedef struct STRUCT_MADGE_INIT_PARMS_HEADER MADGE_INIT_PARMS_HEADER; +typedef struct STRUCT_SMART_INIT_PARMS SMART_INIT_PARMS; +typedef struct STRUCT_FASTMAC_INIT_PARMS FASTMAC_INIT_PARMS; + +/****************************************************************************/ +/* */ +/* Structure type : TI_INIT_PARMS */ +/* */ +/* The TI initialization parameters are exactly those defined by TI for */ +/* initializing an adapter based on the EAGLE chipset except for a special */ +/* byte of 16/4 MC 32 configuration information. This byte overrides a TI */ +/* initialization block field not used by Madge adapter cards. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-42 4.6 Adapter Initialization */ +/* */ + +struct STRUCT_TI_INIT_PARMS + { + WORD init_options; + WORD madge_mc32_config; /* special MC 32 data */ + BYTE reserved[4]; /* ignored by Madge cards */ + WORD rx_burst; + WORD tx_burst; + BYTE parity_retry; + BYTE dma_retry; + DWORD scb_addr; /* 32 bit phys host addr */ + DWORD ssb_addr; /* 32 bit phys host addr */ + }; + + +/****************************************************************************/ +/* */ +/* Values : TI_INIT_PARMS - WORD init_options */ +/* */ +/* The init_options are set up for burst mode DMA. */ +/* */ + +#define TI_INIT_OPTIONS_BURST_DMA 0x9F00 + + +/****************************************************************************/ +/* */ +/* Values : TI_INIT_PARMS - WORD madge_mc32_config */ +/* */ +/* This value is used to configure MC and ISA CLIENT cards. */ +/* */ + +#define MC_AND_ISACP_USE_PIO 0x0040 + + +/****************************************************************************/ +/* */ +/* Values : TI_INIT_PARMS - BYTE parity_retry, BYTE dma_retry */ +/* */ +/* A default value is used by the FTK for the parity and dma retry counts. */ +/* */ + +#define TI_INIT_RETRY_DEFAULT 5 + + +/****************************************************************************/ +/* */ +/* Structure type : MADGE_INIT_PARMS_HEADER */ +/* */ +/* This is the common header to all Madge smart software initialization */ +/* parameter blocks - that is, in this case, the header for the general */ +/* smart software MAC level parameters and the Fastmac specific parameters. */ +/* */ +/* REFERENCE : The Madge Smart SRB Interface */ +/* - Bring-Up and Initialization */ +/* */ + + +struct STRUCT_MADGE_INIT_PARMS_HEADER + { + WORD length; /* byte length of parms */ + WORD signature; /* parms specific */ + WORD reserved; /* must be 0 */ + WORD version; /* parms specific */ + }; + + +/****************************************************************************/ +/* */ +/* Structure type : SMART_INIT_PARMS */ +/* */ +/* This structure contains general MAC level parameters for when */ +/* downloading any Madge smart software. */ +/* */ +/* REFERENCE : The Madge Smart SRB Interface */ +/* - Bring-Up and Initialization */ +/* */ + +struct STRUCT_SMART_INIT_PARMS + { + + MADGE_INIT_PARMS_HEADER header; + + WORD reserved_1; /* must be 0 */ + NODE_ADDRESS permanent_address; /* BIA PROM node address */ + WORD rx_tx_buffer_size; /* 0 => default 1K-8 bytes */ + DWORD reserved_2; /* must be 0 */ + WORD dma_buffer_size; /* 0 => no limit */ + WORD max_buffer_ram; /* 0 => default 2MB */ + WORD min_buffer_ram; /* 0 => default 10K */ + WORD sif_burst_size; /* 0 => no limit */ + }; + + +/****************************************************************************/ +/* */ +/* Values : SMART_INIT_PARMS - header. WORD signature, WORD version */ +/* */ +/* The values for the header of the general smart software MAC level */ +/* paramters strcture. */ +/* */ + +#define SMART_INIT_HEADER_SIGNATURE 0x0007 +#define SMART_INIT_HEADER_VERSION 0x0101 +#ifdef FMPLUS +#define SMART_INIT_MIN_RAM_DEFAULT 0x0002 +#endif + +/****************************************************************************/ +/* */ +/* Structure type : SMART_FASTMAC_INIT_PARMS */ +/* */ +/* The Fastmac initialization parameters as specified in the Fastmac */ +/* documentation. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - Initialization */ +/* */ + + +struct STRUCT_FASTMAC_INIT_PARMS + { + + MADGE_INIT_PARMS_HEADER header; + + WORD feature_flags; + WORD int_flags; + + WORD open_options; /* only for auto_open */ + NODE_ADDRESS open_address; /* only for auto_open */ + DWORD group_address; /* only for auto_open */ + DWORD functional_address; /* only for auto_open */ + + DWORD rx_buf_physaddr; /* set to zero for FMPlus */ + WORD rx_buf_size; /* (see rx_bufs/rx_slots) */ + WORD rx_buf_space; + + DWORD tx_buf_physaddr; /* set to zero for FMPlus */ + WORD tx_buf_size; /* (see tx_bufs/tx_slots) */ + WORD tx_buf_space; + + WORD max_frame_size; /* for both rx and tx */ + WORD size_rxdesc_queue; /* set to zero for FMPlus */ + WORD max_rx_dma; /* set to zero for FMPlus */ + + WORD group_root_address; /* only for auto_open */ +#ifdef FMPLUS + WORD rx_bufs; /* # of internel rx buffers */ + WORD tx_bufs; /* # of internal tx buffers */ + WORD rx_slots; /* # of host rx buffers */ + WORD tx_slots; /* # of host tx buffers */ + WORD tx_ahead; /* Leave as zero */ +#endif + }; + + +/****************************************************************************/ +/* */ +/* Values : FASTMAC_INIT_PARMS - header. WORD signature, WORD version */ +/* */ +/* The values for the header of the Fastmac specific initialization */ +/* parameter block. */ +/* */ + +#ifdef FMPLUS +#define FMPLUS_INIT_HEADER_SIGNATURE 0x000E +#define FMPLUS_INIT_HEADER_VERSION 0x0200 /* NOT Fastmac version! */ +#else +#define FASTMAC_INIT_HEADER_SIGNATURE 0x0005 +#define FASTMAC_INIT_HEADER_VERSION 0x0405 /* NOT Fastmac version! */ +#endif + +/****************************************************************************/ +/* */ +/* Values : FASTMAC_INIT_PARMS - WORD feature_flags */ +/* */ +/* The feature flag bit signifcant values as described in the Fastmac */ +/* specification document. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - Initialization */ +/* */ + +#define FEATURE_FLAG_AUTO_OPEN 0x0001 +#define FEATURE_FLAG_NOVELL 0x0002 +#define FEATURE_FLAG_SELL_BY_DATE 0x0004 +#define FEATURE_FLAG_PASS_RX_CRC 0x0008 +#define FEATURE_FLAG_WATCHDOG_TIMER 0x0020 +#define FEATURE_FLAG_DISCARD_BEACON_TX 0x0040 +#define FEATURE_FLAG_TRUNCATE_DMA 0x0080 +#define FEATURE_FLAG_DELAY_RX 0x0100 +#define FEATURE_FLAG_ONE_INT_PER_RX 0x0200 +#define FEATURE_FLAG_NEW_INIT_BLOCK 0x0400 +#define FEATURE_FLAG_AUTO_OPEN_ON_OPEN 0x0800 +#define FEATURE_FLAG_DISABLE_TX_FAIRNES 0x1000 +#ifdef FMPLUS +#define FEATURE_FLAG_FMPLUS_ALWAYS_SET 0x0000 +#endif + +/* Yes, the FMPLUS_ALWAYS_SET bit is ZERO, because in fact it must NOT */ +/* always be set! This is an unfortunate historical legacy... */ + + +/****************************************************************************/ +/* */ +/* Values : FASTMAC_INIT_PARMS - WORD int_flags */ +/* */ +/* The interrupt flag bit significant values as described in the Fastmac */ +/* Plus specification document. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Initialization : TMS Load Parms */ +/* */ + +#define INT_FLAG_TX_BUF_EMPTY 0x0001 +#define INT_FLAG_TIMER_TICK_ARB 0x0002 +#define INT_FLAG_RING_STATUS_ARB 0x0004 +#ifdef FMPLUS +#define INT_FLAG_LARGE_DMA 0x0008 +#define INT_FLAG_RX 0x0010 +#endif + +#ifdef FMPLUS +/****************************************************************************/ +/* */ +/* Values : Magic Fastmac Plus numbers to do with buffers on the adapter */ +/* */ +/* The size of buffers on the adapter card can be set with in the init. */ +/* block with the rx_tx_buffer_size field. The minimum value and default */ +/* values are specified here. Also, there are numbers giving the amount of */ +/* memory (in bytes) available for buffers on adapter cards of various RAM */ +/* sizes. */ +/* */ +/* REFERENCE : The Madge Fastmac Plus Programming Specification */ +/* - Initialization : SMTMAC Load Parms */ +/* */ + +#define FMPLUS_MIN_TXRX_BUFF_SIZE 97 + +#define FMPLUS_DEFAULT_BUFF_SIZE_SMALL 504 /* For EISA/MC32 cards */ +#define FMPLUS_DEFAULT_BUFF_SIZE_LARGE 1016 /* For all other cards */ + +#define FMPLUS_MAX_BUFFMEM_IN_128K 63056 /* Bytes available for buffs*/ +#define FMPLUS_MAX_BUFFMEM_IN_256K 193104 /* on cards of 128K,256K, & */ +#define FMPLUS_MAX_BUFFMEM_IN_512K 453200 /* 512K RAM. */ +#endif + +/****************************************************************************/ +/* */ +/* Structure type : INITIALIZATION_BLOCK */ +/* */ +/* The initialization block consists of 3 parts - 22 bytes of TI */ +/* intialization parameters, general smart software MAC level parameters, */ +/* and the Fastmac specific parameters. */ +/* */ + +struct STRUCT_INITIALIZATION_BLOCK + { + TI_INIT_PARMS ti_parms; + SMART_INIT_PARMS smart_parms; + FASTMAC_INIT_PARMS fastmac_parms; + }; + + +#pragma pack() + +/* */ +/* */ +/************** End of FTK_INIT.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_macr.h b/private/ntos/ndis/madge/driver/head_def/ftk_macr.h new file mode 100644 index 000000000..d8bf16bec --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_macr.h @@ -0,0 +1,157 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MACRO DEFINITIONS */ +/* ===================== */ +/* */ +/* FTK_MACR.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the macros that are used within the FTK. All */ +/* macros are included here for convenience, even though some are only used */ +/* in a single module. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_MACR.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_MACR_H 221 + + +/****************************************************************************/ +/* */ +/* The macro_dword_align macro is used in DRV_TX.C to align Fastmac buffer */ +/* pointers on DWORD boundaries. */ +/* */ + +#define macro_dword_align(p) (((p) + 0x0003) & 0xFFFC) + + +/****************************************************************************/ +/* */ +/* The macro_word_swap_dword macro is used in DRV_INIT.C, DRV_SRB.C and */ +/* HWI_GEN.C to swap the WORDs within a DWORD in preparation for */ +/* downloading of the DWORD on to the adapter. */ +/* */ + +#define macro_word_swap_dword(dw) dw = ((dw << 16) | (dw >> 16)) + + +/****************************************************************************/ +/* */ +/* The macro_byte_swap_word macro is used in DRV_RX.C and DRV_TX.C to swap */ +/* the BYTEs within a WORD because the length field in a Fastmac buffer is */ +/* in TMS ordering. */ +/* */ + +#define macro_byte_swap_word(w) (((w) << 8) | ((w) >> 8)) + + +/****************************************************************************/ +/* */ +/* The macro_set<w/b>_bit macros are used in HWI_<card_type>.C to set */ +/* specific bits in control and other IO registers without affecting the */ +/* value of any other bits. */ +/* */ +/* The macro_setb_bit macro is for byte-size registers; the macro_setw_bit */ +/* macro is for word-size registers. */ +/* */ + +#define macro_probe_setb_bit(io, b) \ + sys_probe_outsb(io, (BYTE) (sys_probe_insb(io) | (b))) +#define macro_setb_bit(hnd, io, b) \ + sys_outsb( hnd, io, (BYTE) (sys_insb(hnd, io) | (b))) +#define macro_setw_bit(hnd, io, b) \ + sys_outsw( hnd, io, (WORD) (sys_insw(hnd, io) | (b))) + + +/****************************************************************************/ +/* */ +/* The macro_clear<w/b>_bit macros are used in HWI_<card_type>.C to clear */ +/* specific bits in control and other IO registers without affecting the */ +/* value of any other bits. */ +/* */ +/* The macro_clearb_bit macro is for byte-size registers; the */ +/* macro_clearw_bit macro is for word-size registers. */ +/* */ + +#define macro_probe_clearb_bit(io, b) \ + sys_probe_outsb(io, (BYTE) (sys_probe_insb(io) & ~(b))) +#define macro_clearb_bit(hnd, io, b) \ + sys_outsb( hnd, io, (BYTE) (sys_insb(hnd, io) & ~(b))) +#define macro_clearw_bit(hnd, io, b) \ + sys_outsw( hnd, io, (WORD) (sys_insw(hnd, io) & ~(b))) + + +/****************************************************************************/ +/* */ +/* The macro_fatal_error macro is used in DRV_ERR.C to distinguish fatal */ +/* from non-fatal errors. Fatal errors cause an adapter to no longer be */ +/* usable. */ +/* */ + +#define macro_fatal_error(err) \ + \ + ( (err == ERROR_TYPE_HWI) || \ + (err == ERROR_TYPE_DRIVER) || \ + (err == ERROR_TYPE_INIT) || \ + (err == ERROR_TYPE_BRING_UP) || \ + (err == ERROR_TYPE_AUTO_OPEN) || \ + (err == ERROR_TYPE_ADAPTER) ) + + +/****************************************************************************/ +/* */ +/* The macro_get_next_record macro is used in HWI_GEN.C to adjust a */ +/* pointer such that it points to the next download record in a list of */ +/* such records. */ +/* */ + +#define macro_get_next_record(p) \ + \ + p = (DOWNLOAD_RECORD *) (((BYTE *) p) + p->length) + + +/****************************************************************************/ +/* */ +/* The macro_enable_io and macro_disable_io macros are used throughout the */ +/* FTK for enabling/disabling access to specific IO locations. This is */ +/* required under certain operating systems, and the macros are implemented */ +/* by calls to system specific routines. */ +/* */ +/* Note on increasing speed: */ +/* */ +/* The reason for the macros is so that for systems where enabling and */ +/* disabling of IO locations is not required, the macros can just be */ +/* replaced by null code and there is no overhead of calling a system */ +/* routine that does nothing. */ +/* */ + +#define macro_enable_io(adap) \ + sys_enable_io((adap)->io_location, (adap)->io_range) + +#define macro_disable_io(adap) \ + sys_disable_io((adap)->io_location, (adap)->io_range) + +#define macro_probe_enable_io(io_loc, io_range) \ + sys_enable_io(io_loc, io_range) + +#define macro_probe_disable_io(io_loc, io_range) \ + sys_disable_io(io_loc, io_range) + + + +/* */ +/* */ +/************** End of FTK_MACR.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_mc.h b/private/ntos/ndis/madge/driver/head_def/ftk_mc.h new file mode 100644 index 000000000..07807d4e4 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_mc.h @@ -0,0 +1,195 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (MICROCHANNEL CARDS) */ +/* ======================================================= */ +/* */ +/* FTK_MC.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge MC */ +/* adapter cards. Each adapter card has a number of control and status */ +/* registers. ALL bits in ALL registers are defined by Madge Networks Ltd, */ +/* however only a restricted number are defined below as used within the */ +/* FTK. All other bits must NOT be changed and no support will be offered */ +/* for any application that does so or uses the defined bits in any way */ +/* different to the FTK. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_MC.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_MC_H 221 + + +/****************************************************************************/ +/* */ +/* Values : MC REGISTER MAP */ +/* */ +/* Madge MC cards have the following register map. By setting certain bits */ +/* in the control registers it is possible to page in the BIA PROM (page 0 */ +/* or page 1) or the EAGLE SIF registers (normal or extended). */ +/* */ +/* NB. There is a lot of similarity between the MC and ATULA register maps. */ +/* */ + +#define MC_IO_RANGE 16 + +#define MC_CONTROL_REGISTER_0 0 +#define MC_CONTROL_REGISTER_1 1 +#define MC_POS_REGISTER_0 2 +#define MC_POS_REGISTER_1 3 +#define MC_POS_REGISTER_2 4 +#define MC_CONTROL_REGISTER_7 7 + +#define MC_FIRST_SIF_REGISTER 8 + +#define MC_BIA_PROM 8 + + +/****************************************************************************/ +/* */ +/* Values : MC CONTROL_REGISTER_0 */ +/* */ +/* These are the bit definitions for control register 0 on MC cards. */ +/* */ +/* NB. The bit definitions are mostly the same as ATULA CONTROL_REGISTER_7. */ +/* */ + +#define MC_CTRL0_SIFSEL ((BYTE) 0x04) /* page in BIA PROM or SIF regs */ +#define MC_CTRL0_PAGE ((BYTE) 0x08) /* pages BIA PROM or EEPROM */ +#define MC_CTRL0_SINTR ((BYTE) 0x40) /* SIF interrupt pending */ + + +/****************************************************************************/ +/* */ +/* Values : MC CONTROL_REGISTER_1 */ +/* */ +/* These are the bit definitions for control register 1 on MC cards. */ +/* */ +/* NB. The bit definitions are mostly the same as ATULA CONTROL_REGISTER_1. */ +/* */ + +#define MC_CTRL1_SINTREN ((BYTE) 0x01) /* SIF interrupt enable */ +#define MC_CTRL1_NSRESET ((BYTE) 0x04) /* active low SIF reset */ +#define MC_CTRL1_SRSX ((BYTE) 0x40) /* SIF extended register select */ +#define MC_CTRL1_16N4 ((BYTE) 0x80) /* ring speed select */ + + +/****************************************************************************/ +/* */ +/* Values : MC POS_REGISTER_0 */ +/* */ +/* These are the bit definitions for POS register 0 on MC cards. */ +/* */ + +#define MC_POS0_CDEN ((BYTE) 0x01) /* card enabled */ +#define MC_POS0_DMAS ((BYTE) 0x1E) /* arbitration level (4 bits) */ +#define MC_POS0_IRQSEL ((BYTE) 0xC0) /* interrupt (2 bits encoded) */ + + +/****************************************************************************/ +/* */ +/* Values : MC POS_REGISTER_1 */ +/* */ +/* These are the bit definitions for POS register 1 on MC cards. */ +/* */ + +#define MC_POS1_NOSPD ((BYTE) 0x04) /* any speed selected */ +#define MC_POS1_STYPE6 ((BYTE) 0x40) /* 16/4 MC media type */ +#define MC32_POS1_STYPE6 ((BYTE) 0x01) /* 16/4 MC 32 media type */ + + +/****************************************************************************/ +/* */ +/* Values : MC POS_REGISTER_2 */ +/* */ +/* These are the bit definitions for POS register 2 on MC cards. The */ +/* streaming bit is only applicable to 16/4 MC 32 cards. */ +/* */ + +#define MC_POS2_FAIRNESS ((BYTE) 0x10) /* fair bus arbitration */ +#define MC_POS2_16N4 ((BYTE) 0x20) /* ring speed select */ +#define MC_POS2_STREAMING ((BYTE) 0x40) /* use streaming DMA */ + + +/****************************************************************************/ +/* */ +/* Values : MC CONTROL_REGISTER_7 */ +/* */ +/* These are the bit definitions for control register 7 on MC cards. */ +/* */ + +#define MC_CTRL7_STYPE3 ((BYTE) 0x01) /* media type select */ + + +/****************************************************************************/ +/* */ +/* Values : IRQ SELECT IN MC POS_REGISTER_0 */ +/* */ +/* The two interrupt select bits in POS register 0 (MC_POS0_IRQSEL) */ +/* represent the interrupt number the card is on. */ +/* */ + +#define MC_POS0_IRSEL_IRQ3 ((BYTE) 0x40) /* interrupt 3 encoding */ +#define MC_POS0_IRSEL_IRQ9 ((BYTE) 0x80) /* interrupt 9 encoding */ +#define MC_POS0_IRSEL_IRQ10 ((BYTE) 0xC0) /* interrupt 10 encoding */ + + +/****************************************************************************/ +/* */ +/* Values : MC EXTENDED EAGLE SIF REGISTERS */ +/* */ +/* The EAGLE SIF registers are in two groups - the normal SIF registers */ +/* (those from the old TI chipset) and the extended SIF registers (those */ +/* particular to the EAGLE). For Madge MC adapter cards, with CTRL0_SIFSEL */ +/* = 1 and CTRL1_NRESET = 1, having CTRL1_SRSX = 0 selects the normal SIF */ +/* registers and having CTRL1_SRSX = 1 selects the extended SIF registers. */ +/* */ +/* The definitions for the normal SIF registers are in FTK_CARD.H because */ +/* they appear in the same relative IO locations for all adapter cards. The */ +/* extended SIF registers are here because they appear at different */ +/* relative IO locations for different types of adapter cards. For ATULA */ +/* and MC cards they are in fact identical. */ +/* */ + +#define MC_EAGLE_SIFACL 0 /* adapter control */ +#define MC_EAGLE_SIFADR_2 2 /* copy of SIFADR */ +#define MC_EAGLE_SIFADX 4 /* DIO address (high) */ +#define MC_EAGLE_DMALEN 6 /* DMA length */ + +/****************************************************************************/ +/* */ +/* Values : ADAPTER - BYTE mc32_config */ +/* */ +/* The adapter structure field mc32_config is made up of streaming, */ +/* fairness and arbitration level information as follows : */ +/* */ +/* bits 0-3 MC_POS0_DMAS */ +/* bit 4 MC_POS2_FAIRNESS */ +/* bit 5 MC_POS2_STREAMING */ +/* */ +/* The POS register fields need to be shifted into the correct bit */ +/* positions for the mc32_config byte. The right shift values are given */ +/* below. */ +/* */ + +#define MC32_CONFIG_DMA_SHIFT ((BYTE) 1) +#define MC32_CONFIG_FAIRNESS_SHIFT ((BYTE) 0) +#define MC32_CONFIG_STREAMING_SHIFT ((BYTE) 1) + + +/* */ +/* */ +/************** End of FTK_MC.H file ****************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_pci.h b/private/ntos/ndis/madge/driver/head_def/ftk_pci.h new file mode 100644 index 000000000..6c6a63ea6 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_pci.h @@ -0,0 +1,150 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (PCI CARDS) */ +/* =================================================== */ +/* */ +/* FTK_PCI.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1994 */ +/* Developed by PRR */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge Smart */ +/* 16/4 PCI */ +/* adapter cards. These adapter cards have a couple of control registers, */ +/* in addition to the SIF registers. ALL bits in ALL control registers are */ +/* defined by Madge Networks Ltd */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_PCI.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_PCI_H 221 + + +/****************************************************************************/ +/* */ +/* Values : PCI REGISTER MAP */ +/* */ +/* The Madge PCI Ringnode uses the following register layout. */ +/* N.B. The SIF registers are mapped linearly, with no overlaying. */ +/* */ + +#define PCI_GENERAL_CONTROL_REG 0 +#define PCI_INT_MASK_REG 4 +#define PCI_SEEPROM_CONTROL_REG 8 +#define PCI_FIRST_SIF_REGISTER 0x20 + +#define PCI_IO_RANGE 256 + +#define PCI1_SRESET 1 /* Bit 0 of General Control Register */ +#define PCI1_RSPEED_4MBPS 0x200 /* Bit 9 of General Control Register */ +#define PCI1_RSPEED_VALID 0x400 /* Bit 10 of General Control Register */ + +#define PCI1_BIA_CLK 0x0001 /* Bit 0 of SEEPROM control word. */ +#define PCI1_BIA_DOUT 0x0002 /* Bit 1 of SEEPROM control word. */ +#define PCI1_BIA_ENA 0x0004 /* Bit 2 of SEEPROM control word. */ +#define PCI1_BIA_DIN 0x0008 /* Bit 3 of SEEPROM control word. */ + +#define PCI1_ENABLE_MMIO 0x0080 /* MC32 config value to enable MMIO. */ + + +/****************************************************************************/ +/* */ +/* Values : AT93C46 Serial EEPROM control valuse */ +/* */ + +#define PCI_C46_START_BIT 0x8000 +#define PCI_C46_READ_CMD 0x4000 +#define PCI_C46_ADDR_MASK 0x003f +#define PCI_C46_ADDR_SHIFT 7 +#define PCI_C46_CMD_LENGTH 9 + + +/****************************************************************************/ +/* */ +/* Values : PCI SIF REGISTERS */ +/* */ +/* The EAGLE SIF registers are in two groups - the normal SIF registers */ +/* (those from the old TI chipset) and the extended SIF registers (those */ +/* particular to the EAGLE). */ +/* */ +/* The definitions for the normal SIF registers are here because they */ +/* appear in the same relative IO locations for all adapter cards. */ +/* */ + +#define PCI_SIFDAT 0 /* DIO data */ +#define PCI_SIFDAT_INC 4 /* DIO data auto-increment */ +#define PCI_SIFADR 8 /* DIO address (low) */ +#define PCI_SIFINT 12 /* interrupt SIFCMD-SIFSTS */ + +/* These definitions are for the case when the SIF registers are mapped */ +/* linearly. Otherwise, they will be at some extended location. */ + +#define PCI_SIFACL 16 +#define PCI_SIFADX 24 + +/* These definitions are for Eagle Pseudo DMA. Notice that they replace the */ +/* registers above - this is controlled by SIFACL. */ + +#define PCI_SDMADAT 0 +#define PCI_DMALEN 4 +#define PCI_SDMAADR 8 +#define PCI_SDMAADX 12 + + +/****************************************************************************/ +/* */ +/* Value : Number of IO locations for SIF registers */ +/* */ +/* The number of SIF registers is only needed for enabling and disabling */ +/* ranges of IO ports. For the ATULA and MC cards the SIF registers are in */ +/* 2 pages only using 8 IO ports. However, for EISA cards, the SIF */ +/* registers are in a single page of 16 IO ports. Hence, 16 IO ports need */ +/* to be enabled whenever accessing SIF registers. */ +/* */ + +#define PCI_SIF_IO_RANGE 32 + +/****************************************************************************/ +/* */ +/* Values : Locations of data in the serial EEPROM (in words) */ +/* */ +/* */ + +#define PCI_EEPROM_BIA_WORD0 0 +#define PCI_EEPROM_BIA_WORD1 1 +#define PCI_EEPROM_BIA_WORD2 2 +#define PCI_EEPROM_RING_SPEED 3 +#define PCI_EEPROM_RAM_SIZE 4 + + + +/* */ +/* For some perverted reason it is not possible to read these bits back */ +/* from the SEEPROM control register once they have been written. */ +/* */ + +#define BITS_TO_REMEMBER (PCI1_BIA_ENA | PCI1_BIA_DOUT | PCI1_BIA_CLK) + +/****************************************************************************/ +/* */ +/* Values : Ring speed values stored in the serial EEPROM */ +/* */ +/* */ + +#define PCI_EEPROM_4MBS 1 +#define PCI_EEPROM_16MBPS 0 + +/* */ +/* */ +/************** End of FTK_PCI.H file ***************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_pci2.h b/private/ntos/ndis/madge/driver/head_def/ftk_pci2.h new file mode 100644 index 000000000..4d488bd35 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_pci2.h @@ -0,0 +1,122 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (PCI CARDS) */ +/* =================================================== */ +/* */ +/* FTK_PCI2.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1994 */ +/* Developed by PRR */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge Smart */ +/* 16/4 PCI (BM) adapter cards, ie based on the Madge bus interface ASIC. */ +/* */ +/* The SIF registers are WORD aligned and start at offset 0x10 from the IO */ +/* space */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_PCI.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_PCI_H 221 + +/***************************************************************************/ +/* */ +/* PCI-2 IO Map */ +/* Offsets of register locations are from the start of the card's IO space.*/ +/* */ + +#define PCI2_INTERRUPT_STATUS 0x01 /* One byte. */ +#define PCI2_DMAING 0x01 /* Bit 0 - Dma in progress */ +#define PCI2_SINTR 0x02 /* Bit 1 - SIF int */ +#define PCI2_SWINT 0x04 /* Bit 2 - Software int */ +#define PCI2_PCI_INT 0x80 /* Bit 8 - Catastrophic error */ + +#define PCI2_INTERRUPT_CONTROL 0x02 /* One byte. */ +#define PCI2_SINTEN 0x02 /* Bit 1 - SIF int enable */ +#define PCI2_SWINTEN 0x04 /* Bit 2 - S/w int enable */ +#define PCI2_PCI_ERR_EN 0x80 /* Bit 9 - Catastrophic err en */ + +#define PCI2_RESET 0x04 /* One byte. */ +#define PCI2_CHIP_NRES 0x01 /* Bit 0 - Reset chip if zero */ +#define PCI2_FIFO_NRES 0x02 /* Bit 2 - Fifo reset if zero */ +#define PCI2_SIF_NRES 0x04 /* Bit 3 - SIF reset if zero */ + +#define PCI2_SEEPROM_CONTROL 0x07 /* One byte. */ +#define PCI2_SEESK 0x01 /* Bit 0 - Clock */ +#define PCI2_SEED 0x02 /* Bit 1 - Data */ +#define PCI2_SEEOE 0x04 /* Bit 2 - Output enable */ + +#define PCI2_EEPROM_CONTROL 0x08 /* Dword - Low 19 bits are addr */ +#define PCI2_AUTOINC 0x80000000 /* Bit 31 - Does addr autoinc */ + +#define PCI2_EEPROM_DATA 0x0C /* One byte. */ + +#define PCI2_SIF_OFFSET 0x10 + +/* Locations 0x22 onwards are for ASIC debugging only */ +#define PCI2_IO_RANGE 0x36 + + + +/****************************************************************************/ +/* */ +/* Bits for programming the EEPROM */ +/* */ +/* */ +#define AT24_IO_CLOCK 1 +#define AT24_IO_DATA 2 +#define AT24_IO_ENABLE 4 + +/****************************************************************************/ +/* */ +/* Usefule locations in the EEPROM */ +/* */ +/* */ +#define PCI2_EEPROM_BIA_WORD0 9 +#define PCI2_EEPROM_BIA_WORD1 10 +#define PCI2_EEPROM_BIA_WORD2 11 +#define PCI2_EEPROM_RING_SPEED 12 +#define PCI2_EEPROM_RAM_SIZE 13 +#define PCI2_HWF1 14 +#define PCI2_HWF2 15 + + +/****************************************************************************/ +/* */ +/* Useful values in the EEPROM */ +/* */ +#define PCI2_EEPROM_4MBITS 1 +#define PCI2_EEPROM_16MBITS 0 + + +#define PCI2_BUS_MASTER_ONLY 4 +#define PCI2_HW2_431_READY 0x10 + + +/****************************************************************************/ +/* */ +/* Useful locations in the PCI config space */ +/* */ +/* */ +#define PCI_CONFIG_COMMAND 0x4 + +/****************************************************************************/ +/* */ +/* The BUS Master DMA Enable bit in the CONFIG_COMMAND register */ +#define PCI_CONFIG_BUS_MASTER_ENABLE 0x4 + + +/* */ +/* */ +/************** End of FTK_PCI.H file ***************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_pcit.h b/private/ntos/ndis/madge/driver/head_def/ftk_pcit.h new file mode 100644 index 000000000..9822c09ce --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_pcit.h @@ -0,0 +1,109 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (PCI CARDS) */ +/* =================================================== */ +/* */ +/* FTK_PCIT.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1994 */ +/* Developed by PRR */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge Smart */ +/* 16/4 PCI (T) adapter cards, ie based on the Ti PCI bus interface ASIC */ +/* The only IO registers are the SIF registers, all other control is */ +/* through PCI config space */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_PCI.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_PCI_H 221 + + +/****************************************************************************/ +/* */ +/* Values : PCI REGISTER MAP */ +/* */ +/* The Madge PCI Ringnode uses the following register layout. */ +/* N.B. The SIF registers are mapped linearly, with no overlaying. */ +/* */ +#define PCIT_HANDSHAKE 0x100C +#define PCIT_HANDSHAKE 0x100C + + +/****************************************************************************/ +/* */ +/* Useful locations in the PCI config space */ +/* */ +/* */ +#define EEPROM_OFFSET 0x48 +#define MISC_CONT_REG 0x40 +#define PCI_CONFIG_COMMAND 0x4 +#define CACHE_LINE_SIZE 0xC + +/****************************************************************************/ +/* */ +/* The BUS Master DMA Enable bit in the CONFIG_COMMAND register */ +#define PCI_CONFIG_BUS_MASTER_ENABLE 0x4 +#define PCI_CONFIG_IO_ENABLE 0x2 +#define PCI_CONFIG_MEM_ENABLE 0x1 + +/****************************************************************************/ +/* */ +/* Bits for programming the EEPROM */ +/* */ +/* */ +#define AT24_IO_CLOCK 1 +#define AT24_IO_DATA 2 +#define AT24_IO_ENABLE 4 + +/****************************************************************************/ +/* */ +/* EEPROM commands */ +/* */ +#define AT24_WRITE_CMD 0xA0 +#define AT24_READ_CMD 0xA1 + +/****************************************************************************/ +/* */ +/* Useful locations in the EEPROM */ +/* */ +/* */ + +#define PCIT_EEPROM_BIA_WORD0 9 +#define PCIT_EEPROM_BIA_WORD1 10 +#define PCIT_EEPROM_BIA_WORD2 11 +#define PCIT_EEPROM_RING_SPEED 12 +#define PCIT_EEPROM_RAM_SIZE 13 +#define PCIT_EEPROM_HWF2 15 + +#define NSEL_4MBITS 3 +#define NSEL_16MBITS 1 + +/****************************************************************************/ +/* */ +/* Values in the EEPROM */ +/* */ +#define PCIT_EEPROM_4MBITS 1 +#define PCIT_EEPROM_16MBITS 0 + +#define PCIT_BROKEN_DMA 0x20 + +/* +* Value passed to the adapter in the mc32 byte to tell it to use the FMPLUS +* code which supports broken DMA. +*/ +#define TRN_PCIT_BROKEN_DMA 0x200 + +/* */ +/* */ +/************** End of FTK_PCI.H file ***************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_pcmc.h b/private/ntos/ndis/madge/driver/head_def/ftk_pcmc.h new file mode 100644 index 000000000..b229657ae --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_pcmc.h @@ -0,0 +1,256 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (PCMCIA CARDS) */ +/* ================================================= */ +/* */ +/* FTK_PCMC.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by VL */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge PCMCIA */ +/* adapter cards. Each adapter card has a number of control and status */ +/* registers. ALL bits in ALL registers are defined by Madge Networks Ltd, */ +/* however only a restricted number are defined below as used within the */ +/* FTK. All other bits must NOT be changed and no support will be offered */ +/* for any application that does so or uses the defined bits in any way */ +/* different to the FTK. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_PCMC.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_PCMC_H 221 + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA REGISTER MAP */ +/* */ +/* Madge PCMCIA cards have the following register map. All SIF registers */ +/* are always visible. */ +/* */ + +#define PCMCIA_IO_RANGE 32 + +#define PCMCIA_CONTROL_REGISTER_1 0x0000 +#define PCMCIA_CONTROL_REGISTER_2 0x0002 + +#define PCMCIA_PIO_IO_LOC 0x0008 + +#define PCMCIA_FIRST_SIF_REGISTER 0x0010 + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA_CONTROL_REGISTER_1 */ +/* */ +/* These are bit definitions for control register 1 on PCMCIA adapters. */ +/* */ + +#define PCMCIA_CTRL1_SINTREN ((BYTE) 0x01) /* SIF interrupt enable */ +#define PCMCIA_CTRL1_SRESET ((BYTE) 0x02) /* EAGLE SIF reset */ +#define PCMCIA_CTRL1_CISDIS ((BYTE) 0x04) /* CIS ROM / extern EEPROM */ +#define PCMCIA_CTRL1_SHLDA ((BYTE) 0x40) /* SHLDA pin status (PIO) */ +#define PCMCIA_CTRL1_SHRQ ((BYTE) 0x80) /* SHRQ pin status (PIO) */ + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA_CONTROL_REGISTER_2 */ +/* */ +/* These are bit definitions for control register 2 on PCMCIA adapters. */ +/* */ + +#define PCMCIA_CTRL2_SBCKSEL ((BYTE) 0x03) /* SIF clock frequency */ +#define PCMCIA_CTRL2_4N16 ((BYTE) 0x04) /* Ring speed 4/16 */ +#define PCMCIA_CTRL2_FLSHWREN ((BYTE) 0x08) /* EEPROM write enable */ +#define PCMCIA_CTRL2_E2SK ((BYTE) 0x10) /* SK (sync clk) pin of EEPROM */ +#define PCMCIA_CTRL2_E2CS ((BYTE) 0x20) /* CS (chip sel) pin of EEPROM */ +#define PCMCIA_CTRL2_E2DI ((BYTE) 0x40) /* DI (data in) pin of EEPROM */ +#define PCMCIA_CTRL2_E2DO ((BYTE) 0x80) /* Output statue of EEPROm */ + +#define PCMCIA_CTRL2_4N16_4 ((BYTE) 0x04) /* ringspeed = 4MB/s */ +#define PCMCIA_CTRL2_4N16_16 ((BYTE) 0x00) /* ringspeed = 16MB/s */ + +#define PCMCIA_CTRL2_SBCKSEL_2 ((BYTE) 0x00) /* sif clock frequency 2MHz */ +#define PCMCIA_CTRL2_SBCKSEL_8 ((BYTE) 0x01) /* sif clock frequency 8MHz */ +#define PCMCIA_CTRL2_SBCKSEL_16 ((BYTE) 0x02) /* sif clock frequency 16MHz */ +#define PCMCIA_CTRL2_SBCKSEL_32 ((BYTE) 0x03) /* sif clock frequency 32MHz */ + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA EXTENDED EAGLE SIF REGISTERS */ +/* */ +/* The EAGLE SIF registers are in two groups - the normal SIF registers */ +/* (those from the old TI chipset) and the extended SIF registers (those */ +/* particular to the EAGLE). For Madge PCMCIA adapter cards, both normal */ +/* and extended SIF registers are always accessible. */ +/* */ +/* The definitions for the normal SIF registers are in FTK_CARD.H because */ +/* they appear in the same relative IO locations for all adapter cards. The */ +/* extended SIF registers are here because they appear at different */ +/* relative IO locations for different types of adapter cards. */ +/* */ + +#define PCMCIA_EAGLE_SIFACL 8 /* adapter control */ +#define PCMCIA_EAGLE_SIFADR_2 10 /* copy of SIFADR */ +#define PCMCIA_EAGLE_SIFADX 12 /* DIO address (high) */ +#define PCMCIA_EAGLE_DMALEN 14 /* DMA length */ + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA CARD CONFIGURATION REGISTER */ +/* */ +/* These are definition of PCMCIA card configuration register (CCR) which */ +/* are mapped into attribute memory space. They should only be accessed */ +/* through PCMCIA Card Services. */ +/* */ + +#define PCMCIA_CONFIG_BASE 0x00000800 /* Offset from attribute memory space */ + +/* SMART 16/4 PCMCIA ringnode only have Configuration Option Register and */ +/* Configuration Status Register. There are no Pin Register and Socket/Copy */ +/* Register. */ + +#define PCMCIA_REGISTER_PRESENT RC_PRESENT_OPTION_REG | RC_PRESENT_STATUS_REG + +#define PCMCIA_OPTION_REG 0x00 /* configruation option register (COR) */ +#define PCMCIA_STATUS_REG 0x02 /* configuration status register (CSR) */ + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA CARD CONFIGURATION OPTION REGISTER (COR) */ +/* */ + +#define PCMCIA_COR_CNFGD_MASK ((BYTE) 0x3F) /* IO Config. Enable port */ +#define PCMCIA_COR_LEVLREQ ((BYTE) 0x40) /* Level/Edge IRQ mode select */ +#define PCMCIA_COR_SYSRESET ((BYTE) 0x80) /* soft reset (not sif reset) */ + + +/****************************************************************************/ +/* */ +/* Values : PCMCIA CARD CONFIGURATION STATUS REGISTER (CSR) */ +/* */ + +#define PCMCIA_CSR_RSRVD2 ((BYTE) 0x01) /* Reserved */ +#define PCMCIA_CSR_INTR ((BYTE) 0x02) /* Interrupt request to host */ +#define PCMCIA_CSR_PWRDWN ((BYTE) 0x04) /* Power down bit. Not used */ +#define PCMCIA_CSR_AUDIO ((BYTE) 0x08) /* Audio. Not used */ +#define PCMCIA_CSR_RSRVD1 ((BYTE) 0x10) /* Reserved */ +#define PCMCIA_CSR_IOIS8 ((BYTE) 0x20) /* 8-bit/16-bit data path */ +#define PCMCIA_CSR_SIGCHG ((BYTE) 0x40) /* Status Change. Not used */ +#define PCMCIA_CSR_CHANGED ((BYTE) 0x80) /* Not used */ + + +/****************************************************************************/ +/* */ +/* Initial Setting of these register */ +/* */ + +#define PCMCIA_STATUS_REG_SETTING ((BYTE) 0x00) +#define PCMCIA_PIN_REG_SETTING ((BYTE) 0x00) +#define PCMCIA_COPY_REG_SETTING ((BYTE) 0x00) +#define PCMCIA_OPTION_REG_SETTING \ + ( 0x01 & PCMCIA_COR_CNFGD_MASK ) | PCMCIA_COR_LEVLREQ + + +/****************************************************************************/ +/* */ +/* Other Hardware specification related definitions */ +/* */ + + +/* */ +/* EEPROM */ +/* */ + +#define C46_START_BIT 0x8000 /* start bit of command */ +#define C46_READ_CMD 0x4000 /* command to enable reading of EEPROM */ +#define C46_ADDR_MASK 0x003F /* Bottom 6 bits are the address */ +#define C46_ADDR_SHIFT 7 /* no. of bits to shift the address */ +#define C46_CMD_LENGTH 9 /* 1 start bit, 2 cmd bits, 6 adr bits */ + +#define EEPROM_ADDR_NODEADDR1 0x0000 /* 1st word in EEPROM = Nodeaddress1 */ +#define EEPROM_ADDR_NODEADDR2 0x0001 /* 2nd word in EEPROM = Nodeaddress2 */ +#define EEPROM_ADDR_NODEADDR3 0x0002 /* 3rd word in EEPROM = Nodeaddress3 */ +#define EEPROM_ADDR_RINGSPEED 0x0003 /* 4th word in EEPROM = RingSpeed */ +#define EEPROM_ADDR_RAMSIZE 0x0004 /* 5th word in EEPROM = Ram size / 128 */ +#define EEPROM_ADDR_REVISION 0x0005 /* 6th word in EEPROM = Revsion */ + +#define EEPROM_RINGSPEED_16 0x0000 /* The 4th word = 0 -> 16MB/s */ +#define EEPROM_RINGSPEED_4 0x0001 /* The 4th word = 1 -> 4MB/s */ + + +/* */ +/* Miscellaneous */ +/* */ + +#define PCMCIA_RAM_SIZE 512 /* 512k RAM on adapter */ + +#define PCMCIA_NUMBER_OF_ADDR_LINES 16 /* Number of address lines decoded */ + +#define PCMCIA_VCC 50 /* Vcc in tenth of a volt */ +#define PCMCIA_VPP1 0 /* Vpp1 in tenth of a volt */ +#define PCMCIA_VPP2 0 /* Vpp2 in tenth of a volt */ + + +/****************************************************************************/ +/* */ +/* Madge Signature for tuple CISTPL_VERS_1 */ +/* */ + +#define MADGE_TPLLV1_INFO_LEN 33 /* note that there is a '\0' in the string */ + /* so strlen will not work. */ + + /* 123456 789012345678901234567890123 */ + +#define MADGE_TPLLV1_INFO_STRING "MADGE\0SMART 16/4 PCMCIA RINGNODE" + + +/****************************************************************************/ +/* */ +/* Data sturcture of tuple CISTPL_VERS_1 */ +/* */ +/* Note that CS Level 2.00 or below start with a byte of tpl_code and a */ +/* byte of tpl_link. They are removed in CS Level 2.01 */ +/* */ + +struct STRUCT_CS200_CISTPL_VERS_1_DATA +{ + BYTE tpl_code; + BYTE tpl_link; + BYTE tpllv1_major; + BYTE tpllv1_minor; + BYTE info[MADGE_TPLLV1_INFO_LEN]; + BYTE additional_info[1]; +}; + +typedef struct STRUCT_CS200_CISTPL_VERS_1_DATA CS200_CISTPL_VERS_1_DATA; + +struct STRUCT_CS201_CISTPL_VERS_1_DATA +{ + BYTE tpllv1_major; + BYTE tpllv1_minor; + BYTE info[MADGE_TPLLV1_INFO_LEN]; + BYTE additional_info[1]; +}; + +typedef struct STRUCT_CS201_CISTPL_VERS_1_DATA CS201_CISTPL_VERS_1_DATA; + +/* */ +/* */ +/********************* End of FTK_PCMC.H file *****************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_pnp.h b/private/ntos/ndis/madge/driver/head_def/ftk_pnp.h new file mode 100644 index 000000000..319a0c15d --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_pnp.h @@ -0,0 +1,142 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (Plug aNd Play (PNP) CARDS) */ +/* ============================================================== */ +/* */ +/* FTK_PNP.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by AC */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge PNP */ +/* adapter cards. These adapter cards have a couple of control registers, */ +/* in addition to the SIF registers. ALL bits in ALL control registers are */ +/* defined by Madge Networks Ltd */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_PNP.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_PNP_H 221 + + +/****************************************************************************/ +/* */ +/* Values : PNP REGISTER MAP */ +/* */ +/* The Madge Smart 16 Ringnode uses the following register layout. */ +/* N.B. The SIF registers are mapped linearly, with no overlaying. */ +/* */ + +#define PNP_IO_RANGE 32 + +#define PNP_CONTROL_REGISTER_1 3 +#define PNP_ID_REGISTER 8 + +#define PNP_FIRST_SIF_REGISTER 16 + + +/****************************************************************************/ +/* */ +/* Values : PNP CONFIGURATION REGISTERS */ +/* */ +/* These are the bit definitions for the PnP configuration registers. */ +/* */ + +#define PNP_CONFIG_ADDRESS_REGISTER 1 +#define PNP_CONFIG_DATA_REGISTER 2 + +#define PNP_VENDOR_CONFIG_BYTE ((BYTE) 0xf0) + +#define PNP_VENDOR_CONFIG_IRQ ((BYTE )0x70) +#define PNP_VENDOR_CONFIG_4MBITS ((BYTE) 0x80) +#define PNP_VENDOR_CONFIG_RSVALID ((BYTE) 0x02) +#define PNP_VENDOR_CONFIG_PXTAL ((BYTE) 0x01) + + +/****************************************************************************/ +/* */ +/* Values : PNP CONTROL_REGISTER_1 */ +/* */ +/* These are the bit definitions for control register 1 on Smart 16 cards. */ +/* */ +/* NB. The bit definitions are mostly the same as MC CONTROL_REGISTER_1. */ +/* */ + +#define PNP_CTRL1_NSRESET ((BYTE) 0x80) /* SIF Reset signal */ +#define PNP_CTRL1_CHRDY_ACTIVE ((BYTE) 0x20) /* Active channel ready. */ + + +/****************************************************************************/ +/* */ +/* This defines the bits used to set the RING SPEED for PNP cards. */ +/* */ +/* The bit is SET/CLEARED in SIFACL via adapter->nselout_bits just before */ +/* taking the card out of the RESET state. */ +/* */ +/* NSELOUT1 is use to control the ring speed */ +/* NSELOUT0 should ALWAYS be left alone. */ +/* */ + +#define PNP_RING_SPEED_4 1 +#define PNP_RING_SPEED_16 0 + +/* +* +* Various definitions used to talk to EEPROM. +* +*/ +#define PNP_CON_REG_OFFSET 4 +#define PNP_EEDO 0x0002 +#define PNP_EEDEN 0x0004 +#define PNP_SSK 0x0001 +#define PNP_DELAY_CNT 16 +#define PNP_WAIT_CNT 1000 +#define PNP_WRITE_CMD 0x00a0 +#define PNP_READ_CMD 0x00a1 + +/* +* Useful locations in the EEPROM +*/ +#define PNP_HWARE_FEATURES1 0xEB +#define PNP_HWARE_FEATURES3 0xED +#define PNP_HWARE_PNP_FLAGS 0xEE + +/* +* +* This defines the bits in HWARE_FEATURES1 which give the DRAM size. +* +*/ + +#define PNP_DRAM_SIZE_MASK 0x3E + +/* +* +* This defines the bits in HWARE_FEATURES3 which give the chip type. +* +*/ + +#define PNP_C30_MASK 0x40 +#define PNP_C30 PNP_C30_MASK + + +/* +* This defines the bits in HWARE_PNP_FLAGS. +*/ + +#define PNP_ACTIVE_FLOAT_CHRDY 0x02 + +/* */ +/* */ +/************** End of FTK_PNP.H file ***************************************/ +/* */ +/* */ + diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_poke.h b/private/ntos/ndis/madge/driver/head_def/ftk_poke.h new file mode 100644 index 000000000..eb469ba9e --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_poke.h @@ -0,0 +1,52 @@ +/**************************************************************************** +* +* FTK_POKE.H +* +* Part of the FastMAC Toolkit. +* Copyright (c) Madge Networks Ltd 1995 +* +* This module provides some functions that will send tracing information +* to either serial port (COM1 or COM2) on a standard IBM PC clone. +* +*****************************************************************************/ + +#ifdef FTK_POKEOUTS + +void _ftk_poke_char(int ch); +void _ftk_poke_string(char *str); +void _ftk_poke_byte(int byte); +void _ftk_poke_word(int word); +void _ftk_poke_dword(long dword); + +#define FTK_POKE_CHAR(x) _ftk_poke_char((int) (x)) +#define FTK_POKE_STRING(x) _ftk_poke_string(x) +#define FTK_POKE_BYTE(x) _ftk_poke_byte((int) (x)) +#define FTK_POKE_WORD(x) _ftk_poke_word((int) (x)) +#define FTK_POKE_DWORD(x) _ftk_poke_dword((long) (x)) + +/* + * Prototypes and macro definitions for comms primitives. + */ + +int _inp(unsigned port); +int _outp(unsigned port, int data_byte); + +#define OUTB(x, y) _outp(x, y) +#define INB(x) _inp(x) + +/* + * Use the following definition to force pokeouts to COM2. + */ + +/* #define USE_COM2 */ + +#else + +#define FTK_POKE_CHAR(x) +#define FTK_POKE_STRING(x) +#define FTK_POKE_BYTE(x) +#define FTK_POKE_WORD(x) +#define FTK_POKE_DWORD(x) + +#endif + diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_sm16.h b/private/ntos/ndis/madge/driver/head_def/ftk_sm16.h new file mode 100644 index 000000000..3005e775d --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_sm16.h @@ -0,0 +1,100 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE MADGE ADAPTER CARD DEFINITIONS (SMART 16 CARDS) */ +/* ================================================ */ +/* */ +/* FTK_SM16.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by AC */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions for programming Madge Smart 16 */ +/* adapter cards. These adapter cards have a couple of control registers, */ +/* in addition to the SIF registers. ALL bits in ALL control registers are */ +/* defined by Madge Networks Ltd */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_SM16.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_SM16_H 221 + + +/****************************************************************************/ +/* */ +/* Values : SMART 16 REGISTER MAP */ +/* */ +/* The Madge Smart 16 Ringnode uses the following register layout. */ +/* N.B. The SIF registers are mapped linearly, with no overlaying. */ +/* */ + +#define SMART16_IO_RANGE 32 + +#define SMART16_DEFAULT_INTERRUPT 2 + +#define SMART16_CONTROL_REGISTER_1 0 +#define SMART16_CONTROL_REGISTER_2 8 + +#define SMART16_FIRST_SIF_REGISTER 16 + + +/****************************************************************************/ +/* */ +/* Values : SMART 16 CONTROL_REGISTER_1 */ +/* */ +/* These are the bit definitions for control register 1 on Smart 16 cards. */ +/* */ +/* NB. The bit definitions are mostly the same as MC CONTROL_REGISTER_1. */ +/* */ + +#define SMART16_CTRL1_NSRESET ((BYTE) 0x01) /* SIF Reset signal */ +#define SMART16_CTRL1_SCS ((BYTE) 0x02) /* Chip select */ + + +/****************************************************************************/ +/* */ +/* Values : SMART 16 CONTROL_REGISTER_2 BITS */ +/* */ +/* These are the bit definitions for control register 2 on Smart 16 cards. */ +/* */ + +#define SMART16_CTRL2_XTAL ((BYTE) 0x01) /* Used to decode BIA */ +#define SMART16_CTRL2_SCS ((BYTE) 0x02) /* Same as CTRL1_SCS */ + + +/****************************************************************************/ +/* */ +/* Values : SMART 16 SIFACL INTERRUPT SETTINGS */ +/* */ +/* These are the values to be written into the NSELOUT0/1 bits of SIFACL to */ +/* select the interrupt number on the adapter card. */ +/* */ + +#define SMART16_IRQ_2 3 +#define SMART16_IRQ_3 0 +#define SMART16_IRQ_7 2 + + +/****************************************************************************/ +/* */ +/* Values : SMART 16 IO PORT MASK for revision type */ +/* */ +/* This bit in the IO address selects between rev3 and rev4 bus timings. */ +/* */ + +#define SMART16_REV3 ((UINT) 0x1000) + + +/* */ +/* */ +/************** End of FTK_SM16.H file **************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_srb.h b/private/ntos/ndis/madge/driver/head_def/ftk_srb.h new file mode 100644 index 000000000..027611abd --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_srb.h @@ -0,0 +1,279 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE SRB DEFINITIONS */ +/* =================== */ +/* */ +/* FTK_SRB.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains all the definitions and structures that are */ +/* required for the SRB interface. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface */ +/* */ +/* IMPORTANT : All structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +#pragma pack(1) + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_SRB.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_SRB_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_SRB_HEADER SRB_HEADER; + +typedef union UNION_SRB_GENERAL SRB_GENERAL; + +typedef struct STRUCT_SRB_MODIFY_OPEN_PARMS SRB_MODIFY_OPEN_PARMS; + +typedef struct STRUCT_SRB_OPEN_ADAPTER SRB_OPEN_ADAPTER; + +typedef struct STRUCT_SRB_CLOSE_ADAPTER SRB_CLOSE_ADAPTER; + +typedef struct STRUCT_SRB_SET_MULTICAST_ADDR SRB_SET_GROUP_ADDRESS; +typedef struct STRUCT_SRB_SET_MULTICAST_ADDR SRB_SET_FUNCTIONAL_ADDRESS; + +typedef struct STRUCT_SRB_READ_ERROR_LOG SRB_READ_ERROR_LOG; + +typedef struct STRUCT_SRB_SET_BRIDGE_PARMS SRB_SET_BRIDGE_PARMS; + +typedef struct STRUCT_SRB_SET_PROD_INST_ID SRB_SET_PROD_INST_ID; + +/****************************************************************************/ +/* */ +/* Structure type : SRB_HEADER */ +/* */ +/* All SRBs have a common header. With Fastmac all SRBs complete */ +/* synchronously, ie. the return code is never E_FF_COMMAND_NOT_COMPLETE */ +/* and the correlator field is not used. */ +/* */ + +struct STRUCT_SRB_HEADER + { + BYTE function; + BYTE correlator; + BYTE return_code; + BYTE reserved; + }; + + +/****************************************************************************/ +/* */ +/* Values : SRB_HEADER - BYTE function */ +/* */ +/* These are the SRBs currently supported by the FTK. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface */ +/* */ + +#define MODIFY_OPEN_PARMS_SRB 0x01 +#define OPEN_ADAPTER_SRB 0x03 +#define CLOSE_ADAPTER_SRB 0x04 +#define SET_GROUP_ADDRESS_SRB 0x06 +#define SET_FUNCTIONAL_ADDRESS_SRB 0x07 +#define READ_ERROR_LOG_SRB 0x08 +#define SET_BRIDGE_PARMS_SRB 0x09 +#define FMPLUS_SPECIFIC_SRB 0xC3 + +#define SET_PROD_INST_ID_SUBCODE 4 + +/****************************************************************************/ +/* */ +/* Values : SRB_HEADER - BYTE return_code */ +/* */ +/* These are defined in FTK_ERR.H */ +/* */ + + +/****************************************************************************/ +/* */ +/* Structure type : SRB_MODIFY_OPEN_PARMS */ +/* */ +/* This SRB is issued to modify the open options for an adapter. The */ +/* adapter can be in auto-open mode or have been opened by an SRB (see */ +/* below). */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Modify Open Parms SRB */ +/* */ + +struct STRUCT_SRB_MODIFY_OPEN_PARMS + { + SRB_HEADER header; + WORD open_options; + }; + + +/****************************************************************************/ +/* */ +/* Structure type : SRB_OPEN_ADAPTER */ +/* */ +/* This SRB is issued to open the adapter with the given node address and */ +/* functional and group addresses. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Open Adapter SRB */ +/* */ + +struct STRUCT_SRB_OPEN_ADAPTER + { + SRB_HEADER header; + BYTE reserved_1[2]; + WORD open_error; /* secondary error code */ + WORD open_options; /* see USER.H for options */ + NODE_ADDRESS open_address; + DWORD group_address; + DWORD functional_address; + WORD reserved_2; + WORD reserved_3; + WORD reserved_4; + BYTE reserved_5; + BYTE reserved_6; + BYTE reserved_7[10]; + char product_id[SIZEOF_PRODUCT_ID]; /* network managers */ + }; + + +/****************************************************************************/ +/* */ +/* Structure type : SRB_CLOSE_ADAPTER */ +/* */ +/* The SRB for closing the adapter consists of just an SRB header. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Close Adapter SRB */ +/* */ + +struct STRUCT_SRB_CLOSE_ADAPTER + { + SRB_HEADER header; + }; + + +/****************************************************************************/ +/* */ +/* Structure types : SRB_SET_GROUP_ADDRESS */ +/* SRB_SET_FUNCTIONAL_ADDRESS */ +/* */ +/* This structure is used for SRBs for setting both the functional and */ +/* group addresses of an adapter. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Set Group/Functional Address SRB */ +/* */ + +struct STRUCT_SRB_SET_MULTICAST_ADDR + { + SRB_HEADER header; + WORD reserved; + MULTI_ADDRESS multi_address; + }; + + +/****************************************************************************/ +/* */ +/* Structure type : SRB_READ_ERROR_LOG */ +/* */ +/* This SRB is used to get MAC error log counter information from the */ +/* adapter. The counters are reset to zero as they are read. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Read Error Log SRB */ +/* */ + +struct STRUCT_SRB_READ_ERROR_LOG + { + SRB_HEADER header; + WORD reserved; + ERROR_LOG error_log; /* defined in FTK_USER.H */ + }; + + +/****************************************************************************/ +/* */ +/* Structure type : SRB_SET_BRIDGE_PARMS */ +/* */ +/* This SRB is used to configure the TI Source Routing Accelerator (SRA) */ +/* ASIC. The adapter must be open for this SRB to work. */ +/* The order for the fields in the options word is : */ +/* Bit 15 (MSB) : single-route-broadcast */ +/* Bit 14 - 10 : reserved (all zero) */ +/* Bit 9 - 4 : maximum route length */ +/* Bit 3 - 0 : number of bridge bits */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Set Bridge Parms SRB */ +/* */ + +struct STRUCT_SRB_SET_BRIDGE_PARMS + { + SRB_HEADER header; + WORD options; + UINT this_ring; + UINT that_ring; + UINT bridge_num; + }; + +#define SRB_SBP_DFLT_BRIDGE_BITS 4 +#define SRB_SBP_DFLT_ROUTE_LEN 18 + + +struct STRUCT_SRB_SET_PROD_INST_ID + { + SRB_HEADER header; + WORD subcode; + BYTE product_id[SIZEOF_PRODUCT_ID]; + }; + +/****************************************************************************/ +/* */ +/* Structure type : SRB_GENERAL */ +/* */ +/* This SRB structure is a union of all the possible SRB structures used by */ +/* the FTK. Included in the union is an SRB header structure so that the */ +/* header of an SRB can be accessed without knowing the type of SRB. */ +/* */ + +union UNION_SRB_GENERAL + { + SRB_HEADER header; + SRB_MODIFY_OPEN_PARMS mod_parms; + SRB_OPEN_ADAPTER open_adap; + SRB_CLOSE_ADAPTER close_adap; + SRB_SET_GROUP_ADDRESS set_group; + SRB_SET_FUNCTIONAL_ADDRESS set_func; + SRB_READ_ERROR_LOG err_log; + SRB_SET_BRIDGE_PARMS set_bridge_parms; + SRB_SET_PROD_INST_ID set_prod_inst_id; + }; + +#pragma pack() + + +/* */ +/* */ +/************** End of FTK_SRB.H file ***************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_tab.h b/private/ntos/ndis/madge/driver/head_def/ftk_tab.h new file mode 100644 index 000000000..89ff399f9 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_tab.h @@ -0,0 +1,1054 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE ERROR TABLES DEFINITIONS */ +/* ============================ */ +/* */ +/* FTK_TAB.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1993 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains the definitions and local variable */ +/* declarations that are required by the error handling part of the FTK. It */ +/* includes the error message text for all the possible errors that can */ +/* occur. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_TAB.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_TAB_H 221 + +#ifndef FTK_NO_ERROR_MESSAGES + +/****************************************************************************/ +/* */ +/* Variables : error_msg_headers_table */ +/* */ +/* The error_msg_headers_table contains the text of the error message */ +/* header for each type of error. This header is combined with the main */ +/* body of the error message to produce the full error text which is put in */ +/* the adapter structure of the adapter on which the error occurred. */ +/* */ + +local char * error_msg_headers_table[] = + +{ + "\n SRB error :" + "\n -----------", + + "\n Open adapter error :" + "\n --------------------", + + "\n Data transfer error :" + "\n ---------------------", + + "\n Driver error :" + "\n --------------", + + "\n HWI error :" + "\n -----------", + + "\n Bring up error :" + "\n ----------------", + + "\n Initialization error :" + "\n ----------------------", + + "\n Auto-open adapter error :" + "\n -------------------------", + + "\n Adapter check error :" + "\n ---------------------", + + "\n PCMCIA Card Services error :" + "\n ----------------------------" +}; + + +/****************************************************************************/ +/* */ +/* Variables : special error messages */ +/* */ +/* Some error messages have to have the full text, header and body, */ +/* together. These include those error messages that can be produced when */ +/* there is no valid adapter structure into which to put the full message. */ +/* This is the case for drv_err_msg_1 and drv_err_msg_2. */ +/* */ + +local char drv_err_msg_1[] = + + "\n Driver error :" + "\n --------------" + "\n The adapter handle being used is invalid. It" + "\n has been corrupted by the user of the FTK."; + +local char drv_err_msg_2[] = + + "\n Driver error :" + "\n --------------" + "\n Either the adapter handle is invalid or memory" + "\n for an adapter structure has not successfully" + "\n been allocated by a call to the system routine" + "\n sys_alloc_adapter_structure."; + + +/****************************************************************************/ +/* */ +/* Value : Default marker */ +/* */ +/* Each table of error message texts, for a particular error type, needs a */ +/* final marker in case an unknown error value is encountered. This should */ +/* not occur within the FTK, but it may be that extra error values are */ +/* added by users incorrectly. */ +/* */ + + +#define ERR_MSG_UNKNOWN_END_MARKER 0xFF + + +/****************************************************************************/ +/* */ +/* Variables : srb_error_msg_table */ +/* */ +/* The srb_error_msg_table contains the error message body texts for SRB */ +/* error type messages. These texts are combined with the error type header */ +/* messages to produce the full error message. */ +/* */ + + +local ERROR_MESSAGE_RECORD srb_error_msg_table[] = + +{ + { + SRB_E_03_ADAPTER_OPEN, + "\n The adapter is open and should be closed for" + "\n the previous SRB to complete successfully." + }, + + { + SRB_E_04_ADAPTER_CLOSED, + "\n The adapter is closed and should be open for" + "\n the previous SRB to complete successfully." + }, + + { + SRB_E_06_INVALID_OPTIONS, + "\n The parameters used to configure the bridge are" + "\n invalid in some way." + }, + + { + SRB_E_07_CMD_CANCELLED_FAIL, + "\n The previous SRB command has been cancelled" + "\n because of an unrecoverable error when" + "\n attempting to complete it. A field in the SRB" + "\n is probably invalid." + }, + + { + SRB_E_32_INVALID_NODE_ADDRESS, + "\n The node address field in the previous SRB is" + "\n invalid. Either the BIA PROM on the card is" + "\n faulty or the user has supplied an invalid node" + "\n address to the appropriate driver routine." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : open_error_msg_table */ +/* */ +/* The open_error_msg_table contains the error message body texts for open */ +/* error type messages. These texts are combined with the error type header */ +/* messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD open_error_msg_table[] = + +{ + { + OPEN_E_01_OPEN_ERROR, + "\n The adapter has failed to open onto the ring." + "\n This could be caused by one of the following -" + "\n" + "\n i) the lobe cable is not securely" + "\n attached to the adapter card or cabling" + "\n unit." + "\n" + "\n ii) the ring speed setting on the card" + "\n does not match the actual ring speed." + "\n" + "\n iii) insertion onto the ring has been" + "\n prevented by ring management software." + "\n" + "\n iv) the ring is beaconing." + "\n" + "\n v) there is a crashed ring parameter" + "\n server on the ring." + "\n" + "\n Check the above and then retry the operation." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : data_xfer_error_msg_table */ +/* */ +/* The data_xfer_error_msg_table contains the error message body texts for */ +/* data transfer error type messages. These texts are combined with the */ +/* error type header messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD data_xfer_error_msg_table[] = + +{ + { + DATA_XFER_E_01_BUFFER_FULL, + "\n The Fastmac transmit buffer is full. This is" + "\n probably because it can be filled by the host" + "\n quicker than the adapter can put the frames" + "\n onto the ring. However, it could be because the" + "\n adapter has closed. Hence, check the ring" + "\n status if this error persists." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : driver_error_msg_table */ +/* */ +/* The driver_error_msg_table contains the error message body texts for */ +/* driver error type messages. These texts are combined with the error type */ +/* header messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD driver_error_msg_table[] = + +{ + { + DRIVER_E_03_FAIL_ALLOC_STATUS, + "\n Memory for a status information structure has" + "\n not successfully been allocated by a call to" + "\n the system routine sys_alloc_status_structure." + }, + + { + DRIVER_E_04_FAIL_ALLOC_INIT, + "\n Memory for an initialization block has not" + "\n successfully been allocated by a call to the" + "\n system routine sys_alloc_init_block." + }, + + { + DRIVER_E_05_FAIL_ALLOC_RX_BUF, + "\n Memory for a Fastmac receive buffer has not" + "\n successfully been allocated by a call to the" + "\n system routine sys_alloc_receive_buffer." + }, + + { + DRIVER_E_06_FAIL_ALLOC_TX_BUF, + "\n Memory for a Fastmac transmit buffer has not" + "\n successfully been allocated by a call to the" + "\n system routine sys_alloc_transmit_buffer." + }, + + { + DRIVER_E_07_NOT_PREPARED, + "\n A call to driver_start_adapter has been made" + "\n without first calling driver_prepare_adapter." + }, + + { + DRIVER_E_08_NOT_RUNNING, + "\n A driver routine has been called without first" + "\n getting the adapter up an running (by first" + "\n calling driver_prepare_adapter and then calling" + "\n driver_start_adapter)." + }, + + { + DRIVER_E_09_SRB_NOT_FREE, + "\n The SRB for the adapter is not free and hence" + "\n the previously called driver routine can not" + "\n execute since it uses the SRB. After calling a" + "\n driver routine that uses the SRB, wait for the" + "\n user_completed_srb routine to be called before" + "\n calling such a driver routine again." + }, + + { + DRIVER_E_0A_RX_BUF_BAD_SIZE, + "\n The size of the Fastmac receive buffer is" + "\n either too big or too small. The maximum" + "\n allowable size is 0xFF00. The minimum allowable" + "\n size is 0x0404 which allows the buffer to hold" + "\n a single 1K frame." + }, + + { + DRIVER_E_0B_RX_BUF_NOT_DWORD, + "\n The physical address of the Fastmac receive" + "\n buffer must be on a DWORD boundary ie. the" + "\n bottom 2 bits of the address must be zero." + }, + + { + DRIVER_E_0C_TX_BUF_BAD_SIZE, + "\n The size of the Fastmac transmit buffer is" + "\n either too big or too small. The maximum" + "\n allowable size is 0xFF00. The minimum allowable" + "\n size is 0x0404 which allows the buffer to hold" + "\n a single 1K frame." + }, + + { + DRIVER_E_0D_TX_BUF_NOT_DWORD, + "\n The physical address of the Fastmac transmit" + "\n buffer must be on a DWORD boundary ie. the" + "\n bottom 2 bits of the address must be zero." + }, + + { + DRIVER_E_0E_BAD_RX_METHOD, + "\n The receive method value that has been supplied" + "\n to driver_prepare_adapter is invalid. A choice" + "\n of two values is possible; either" + "\n RX_OUT_OF_INTERRUPTS or RX_BY_SCHEDULED_PROCESS" + "\n is allowed." + }, + + { + DRIVER_E_0F_WRONG_RX_METHOD, + "\n The driver_get_outstanding_receive routine can" + "\n only be called if the receive method chosen is" + "\n RX_BY_SCHEDULED_PROCESS." + }, + + { + DRIVER_E_10_BAD_RX_SLOT_NUMBER, + "\n The number of receive slots requested from the" + "\n driver_prepare_adapter routine must lie within" + "\n the limits set in the FastMac Plus programming" + "\n specification (currently from 4 to 32)." + }, + + { + DRIVER_E_11_BAD_TX_SLOT_NUMBER, + "\n The number of transmit slots requested from" + "\n the driver_prepare_adapter routine must lie" + "\n within the limits set in the FastMac Plus pro-" + "\n gramming specification (currently 4 to 32)." + }, + + { + DRIVER_E_12_FAIL_ALLOC_DMA_BUF, + "\n Memory for a dma buffer has not successfully" + "\n been allocated by a call to the system routine" + "\n sys_alloc_dma_phys_buf." + }, + + { + DRIVER_E_13_BAD_FRAME_SIZE, + "\n The frame size specified is out of range." + "\n Please choose a smaller value." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : hwi_error_msg_table */ +/* */ +/* The hwi_error_msg_table contains the error message body texts for hwi */ +/* error type messages. These texts are combined with the error type header */ +/* messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD hwi_error_msg_table[] = + +{ + { + HWI_E_01_BAD_CARD_BUS_TYPE, + "\n The adapter card bus type given is invalid. It" + "\n does not correspond to a valid Madge adapter" + "\n card bus type." + }, + + { + HWI_E_02_BAD_IO_LOCATION, + "\n The IO location given is not valid for the" + "\n adapter card being used." + }, + + { + HWI_E_03_BAD_INTERRUPT_NUMBER, + "\n The interrupt number given is not valid for the" + "\n adapter card being used." + }, + + { + HWI_E_04_BAD_DMA_CHANNEL, + "\n The DMA channel given is not valid for the" + "\n adapter card being used. Alternatively, a DMA" + "\n channel has been specified and the card is" + "\n configured for PIO mode. Note 16/4 PC cards do" + "\n not support DMA, and that EISA and MC cards do" + "\n not support PIO." + }, + + { + HWI_E_05_ADAPTER_NOT_FOUND, + "\n An adapter card of the given bus type has not" + "\n been found at the IO location specified. Check" + "\n that the adapter details are correct and that" + "\n the adapter card has been correctly installed" + "\n in the machine." + }, + + { + HWI_E_06_CANNOT_USE_DMA, + "\n It is not possible to use DMA when an adapter" + "\n card is in an 8-bit slot. Either select PIO" + "\n data transfer mode or put the adapter card in a" + "\n 16-bit slot. Note 16/4 PC cards do not support" + "\n DMA." + }, + + { + HWI_E_07_FAILED_TEST_DMA, + "\n The test DMAs that take place as part of the" + "\n adapter initialization have failed. The address" + "\n for the DMAs is probably not downloaded to the" + "\n adapter card correctly due to the byte ordering" + "\n of the host machine." + }, + + { + HWI_E_08_BAD_DOWNLOAD, + "\n Downloading the Fastmac binary image has" + "\n failed. When reading the downloaded data back" + "\n from the adapter, it does not equal the data" + "\n that was downloaded. There is probably a fault" + "\n with the adapter card - use a diagnostics" + "\n program to check it more thoroughly." + }, + + { + HWI_E_09_BAD_DOWNLOAD_IMAGE, + "\n The format of the Fastmac binary image that is" + "\n being downloaded is invalid. Check that the" + "\n data has not been corrupted and that the" + "\n pointer to the Fastmac download code (supplied" + "\n to driver_prepare_adapter) is correct." + }, + + { + HWI_E_0A_NO_DOWNLOAD_IMAGE, + "\n No download image has been provided. The" + "\n pointer to the Fastmac binary image supplied to" + "\n driver_prepare_adapter is NULL and hence" + "\n invalid." + }, + + { + HWI_E_0B_FAIL_IRQ_ENABLE, + "\n The required interrupt channel has not been" + "\n successfully enabled by a call to the system" + "\n routine sys_enable_irq_channel." + }, + + { + HWI_E_0C_FAIL_DMA_ENABLE, + "\n The required DMA channel has not been" + "\n successfully enabled by a call to the system" + "\n routine sys_enable_dma_channel." + }, + + { + HWI_E_0D_CARD_NOT_ENABLED, + "\n The card has not been enabled. Both EISA and MC" + "\n cards must be properly configured before use." + "\n Use the configuration utility provided with" + "\n your computer." + }, + + { + HWI_E_0E_NO_SPEED_SELECTED, + "\n A speed (16Mb/s or 4Mb/s) has not been selected" + "\n for the adapter card. Both EISA and MC cards" + "\n must be configured for a particular ring speed" + "\n before use. Use the configuration utility" + "\n provided with your computer." + }, + + { + HWI_E_0F_BAD_FASTMAC_INIT, + "\n The initialization of Fastmac has not completed" + "\n successfully. The node address field in the" + "\n Fastmac status block is not a Madge node" + "\n address. Either an attempt has been made to use" + "\n the FTK with a non-Madge card or there is a" + "\n problem with the adapter. Use a diagnostics" + "\n program to check the adapter card more" + "\n thoroughly." + }, + + { + HWI_E_10_BAD_TX_RX_BUFF_SIZE, + "\n The size of the buffers used by the code on the" + "\n adapter must exceed the minimum value specified" + "\n in the FastMac Plus programming specification," + "\n which is currently 96 bytes." + }, + + { + HWI_E_11_TOO_MANY_TX_RX_BUFFS, + "\n There is not enough memory on the adapter to" + "\n accommodate the number of transmit and receive" + "\n buffers requested. Try reducing the number of" + "\n transmit slots requested, or reducing the allo-" + "\n cation of buffers to large frame transmits in" + "\n hwi_initialise_adapter." + }, + + { + HWI_E_12_BAD_SCB_ALLOC, + "\n Failed to allocate a block of memory suitable" + "\n for the DMA test into the SCB. This is a system" + "\n memory allocation failure, arising in the func-" + "\n tion sys_alloc_dma_buffer." + }, + + { + HWI_E_13_BAD_SSB_ALLOC, + "\n Failed to allocate a block of memory suitable" + "\n for the DMA test into the SSB. This is a system" + "\n memory allocation failure, arising in the func-" + "\n tion sys_alloc_dma_buffer." + }, + + { + HWI_E_14_BAD_PCI_MACHINE, + "\n This machine is either not a 386 (or higher) or" + "\n there is a problem with the PCI BIOS." + }, + + { + HWI_E_15_BAD_PCI_MEMORY, + "\n The PCI BIOS has failed to allocate any memory" + "\n to do memory mapped IO." + }, + + { + HWI_E_16_PCI_3BYTE_PROBLEM, + "\n Internal error &3800" + }, + + { + HWI_E_17_BAD_TRANSFER_MODE, + "\n The transfer mode specified is not supported by" + "\n this card." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : bring_up_error_msg_table */ +/* */ +/* The bring_up_error_msg_table contains the error message body texts for */ +/* bring up error type messages. These texts are combined with the error */ +/* type header messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD bring_up_error_msg_table[] = + +{ + { + BRING_UP_E_00_INITIAL_TEST, + "\n The bring up diagnostics failed with an initial" + "\n test error. This is an unrecoverable hardware" + "\n error. There is probably a fault with the" + "\n adapter card - use a diagnostics program to" + "\n check it more thoroughly." + }, + + { + BRING_UP_E_01_SOFTWARE_CHECKSUM, + "\n The bring up diagnostics failed with an adapter" + "\n software checksum error. This is an" + "\n unrecoverable hardware error. There is probably" + "\n a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + BRING_UP_E_02_ADAPTER_RAM, + "\n The bring up diagnostics failed with an adapter" + "\n RAM error when checking the first 128Kbytes." + "\n This is an unrecoverable hardware error. There" + "\n is probably a fault with the adapter card - use" + "\n a diagnostics program to check it more" + "\n thoroughly." + }, + + { + BRING_UP_E_03_INSTRUCTION_TEST, + "\n The bring up diagonstics failed with an" + "\n instruction test error. This is an" + "\n unrecoverable hardware error. There is probably" + "\n a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + BRING_UP_E_04_INTERRUPT_TEST, + "\n The bring up diagonstics failed with a context" + "\n / interrupt test error. This is an" + "\n unrecoverable hardware error. There is probably" + "\n a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + BRING_UP_E_05_FRONT_END, + "\n The bring up diagonstics failed with a protocol" + "\n handler / ring interface hardware error. This" + "\n is an unrecoverable hardware error. There is" + "\n probably a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + BRING_UP_E_06_SIF_REGISTERS, + "\n The bring up diagonstics failed with a system" + "\n interface register error. This is an" + "\n unrecoverable hardware error. There is probably" + "\n a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + BRING_UP_E_10_TIME_OUT, + "\n The adapter failed to complete the bring up" + "\n diagnostics within the time out period. Check" + "\n that the system provided timer routines are" + "\n working correctly. Alternatively, there may be" + "\n a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : init_error_msg_table */ +/* */ +/* The init_error_msg_table contains the error message body texts for init */ +/* error type messages. These texts are combined with the error type header */ +/* messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD init_error_msg_table[] = + +{ + { + INIT_E_01_INIT_BLOCK, + "\n Adapter initialization has failed because the" + "\n TI initialization block has not been correctly" + "\n downloaded. There is probably a fault with the" + "\n adapter card - use a diagnostics program to" + "\n check it more thoroughly." + }, + + { + INIT_E_02_INIT_OPTIONS, + "\n Adapter initialization has failed because of" + "\n invalid options in the TI part of the" + "\n initialization block. This field is set" + "\n correctly by the FTK and should not be changed" + "\n elsewhere. One possible reason for this error" + "\n is if the structures used by the FTK are not" + "\n byte packed." + }, + + { + INIT_E_03_RX_BURST_SIZE, + "\n Adapter initialization has failed because of an" + "\n odd receive burst size being set in the TI part" + "\n of the initialization block. This field is set" + "\n correctly by the FTK and should not be changed" + "\n elsewhere. One possible reason for this error" + "\n is if the structures used by the FTK are not" + "\n byte packed." + }, + + { + INIT_E_04_TX_BURST_SIZE, + "\n Adapter initialization has failed because of an" + "\n odd transmit burst size being set in the TI" + "\n part of the initialization block. This field is" + "\n set correctly by the FTK and should not be" + "\n changed elsewhere. One possible reason for" + "\n this error is if the structures used by the FTK" + "\n are not byte packed." + }, + + { + INIT_E_05_DMA_THRESHOLD, + "\n Adapter initialization has failed because of an" + "\n invalid DMA abort threshold being set in the TI" + "\n part of the initialization block. This field is" + "\n set correctly by the FTK and should not be" + "\n changed elsewhere. One possible reason for" + "\n this error is if the structures used by the FTK" + "\n are not byte packed." + }, + + { + INIT_E_06_ODD_SCB_ADDRESS, + "\n Adapter initialization has failed because of an" + "\n odd SCB address being set in the TI part of the" + "\n initialization block. This field is set" + "\n correctly by the FTK and should not be changed" + "\n elsewhere. One possible reason for this error" + "\n is if the structures used by the FTK are not" + "\n byte packed." + }, + + { + INIT_E_07_ODD_SSB_ADDRESS, + "\n Adapter initialization has failed because of an" + "\n odd SSB address being set in the TI part of the" + "\n initialization block. This field is set" + "\n correctly by the FTK and should not be changed" + "\n elsewhere. One possible reason for this error" + "\n is if the structures used by the FTK are not" + "\n byte packed." + }, + + { + INIT_E_08_DIO_PARITY, + "\n Adapter initialization has failed because a" + "\n parity error occurred during a DIO write" + "\n operation. There is probably a fault with the" + "\n adapter card - use a diagnostics program to" + "\n check it more thoroughly." + }, + + { + INIT_E_09_DMA_TIMEOUT, + "\n Adapter initialization has failed because of a" + "\n DMA timeout error. The adapter timed out" + "\n waiting for a test DMA transfer to complete. If" + "\n PIO data transfer mode is being used then the" + "\n fault probably lies in the system routines" + "\n called by the PIO code." + }, + + { + INIT_E_0A_DMA_PARITY, + "\n Adapter initialization has failed because of a" + "\n DMA parity error. There is probably a fault" + "\n with the adapter card - use a diagnostics" + "\n program to check it more thoroughly." + }, + + { + INIT_E_0B_DMA_BUS, + "\n Adapter initialization has failed because of a" + "\n DMA bus error. There is probably a fault with" + "\n the adapter card - use a diagnostics program to" + "\n check it more thoroughly." + }, + + { + INIT_E_0C_DMA_DATA, + "\n Adapter initialization has failed because of a" + "\n DMA data error. On completing a test DMA," + "\n comparing the final data to the initial data" + "\n showed an error. If PIO data transfer mode is" + "\n being used then the fault probably lies in the" + "\n system routines called by the PIO code." + }, + + { + INIT_E_0D_ADAPTER_CHECK, + "\n Adapter initialization has failed because of an" + "\n adapter check. An unrecoverable hardware error" + "\n occurred on the adapter. There is probably a" + "\n fault with the adapter card - use a diagnostics" + "\n program to check it more thoroughly." + }, + + { + INIT_E_0E_NOT_ENOUGH_MEMORY, + "\n Adapter initialization failed because there was" + "\n insufficient memory for the number of transmit" + "\n and receive buffers requested. Reduce either" + "\n the buffer allocation or the number of transmit" + "\n slots." + }, + + { + INIT_E_10_TIME_OUT, + "\n The adapter failed to complete initialization" + "\n within the time out period. Check that the" + "\n system provided timer routines are working" + "\n correctly. Another possible reason for this" + "\n error is if the structures used by the FTK are" + "\n not byte packed. Alternatively, there may be a" + "\n fault with the adapter card - use a diagnostics" + "\n program to check it more thoroughly." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : auto_open_error_msg_table */ +/* */ +/* The auto_open_error_msg_table contains the error message body texts for */ +/* auto open error type messages. These texts are combined with the error */ +/* type header messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD auto_open_error_msg_table[] = + +{ + { + AUTO_OPEN_E_01_OPEN_ERROR, + "\n The adapter has failed to open onto the ring." + "\n This could be caused by one of the following -" + "\n" + "\n i) the lobe cable is not securely" + "\n attached to the adapter card or cabling" + "\n unit." + "\n" + "\n ii) insertion onto the ring has been" + "\n prevented by ring management software." + "\n" + "\n iii) there is a crashed ring parameter" + "\n server on the ring." + "\n" + "\n Check the above before retrying the operation." + }, + + { + AUTO_OPEN_E_80_TIME_OUT, + "\n The adapter has failed to open within a" + "\n substantial time out period (greater than 30" + "\n seconds). There is probably a fault with the" + "\n adapter card - use a diagnostics program to" + "\n check it more thoroughly." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : adapter_error_msg_table */ +/* */ +/* The adapter_error_msg_table contains the error message body texts for */ +/* adapter check error type messages. These texts are combined with the */ +/* error type header messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD adapter_error_msg_table[] = + +{ + { + ADAPTER_E_01_ADAPTER_CHECK, + "\n An adapter check interrupt has occurred. An" + "\n unrecoverable hardware error has caused the" + "\n adapter to become inoperable. There is probably" + "\n a fault with the adapter card - use a" + "\n diagnostics program to check it more" + "\n thoroughly." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + +/****************************************************************************/ +/* */ +/* Variables : pcmcia_cs_error_msg_table */ +/* */ +/* The pcmcia_cs_error_msg_table contains the error message body texts for */ +/* PCMCIA Card Services error type messages. These texts are combined with */ +/* the error type header messages to produce the full error message. */ +/* */ + +local ERROR_MESSAGE_RECORD pcmcia_cs_error_msg_table[] = + +{ + { + CS_E_01_NO_CARD_SERVICES, + "\n No PCMCIA Card Services installed. Madge Smart" + "\n 16/4 PCMCIA ringnode driver requires PCMCIA" + "\n Card Services. You can use Card Services which" + "\n come with your computer or Madge Card Services." + }, + + { + CS_E_02_REGISTER_CLIENT_FAILED, + "\n Failed to register with PCMCIA Card Services." + "\n Check that PCMCIA Card Services is properly" + "\n installed. Make sure there is no crashing of" + "\n memory usage with other TSR or memory manager." + }, + + { + CS_E_03_REGISTRATION_TIMEOUT, + "\n PCMCIA Card Services failed to response in time" + "\n Check that PCMCIA Card Services is properly" + "\n installed. Make sure there is no crashing of" + "\n memory usage with other TSR or memory manager." + }, + + { + CS_E_04_NO_MADGE_ADAPTER_FOUND, + "\n No Madge Smart 16/4 PCMCIA Ringnode found." + }, + + { + CS_E_05_ADAPTER_NOT_FOUND, + "\n Cannot find a Madge Smart 16/4 PCMCIA Ringnode" + "\n in the PCMCIA Socket specified. Check if the" + "\n adapter is properly fitted." + }, + + { + CS_E_06_SPECIFIED_SOCKET_IN_USE, + "\n The adapter in the PCMCIA socket specified is" + "\n in use." + }, + + { + CS_E_07_IO_REQUEST_FAILED, + "\n PCMCIA Card Services refused the request for IO" + "\n resource. The IO location specified is being" + "\n used by other devices." + }, + + { + CS_E_08_BAD_IRQ_CHANNEL, + "\n The interrupt number specified is not" + "\n supported." + }, + + { + CS_E_09_IRQ_REQUEST_FAILED, + "\n PCMCIA Card Services refused the request for" + "\n interupt channel resources. The interrupt" + "\n number specified is being used by other devices" + }, + + { + CS_E_0A_REQUEST_CONFIG_FAILED, + "\n PCMCIA Card Services refused the request for" + "\n resources." + }, + + { + ERR_MSG_UNKNOWN_END_MARKER, + "\n An unknown error has occurred." + } +}; + + +/****************************************************************************/ +/* */ +/* Variables : list_of_error_msg_tables */ +/* */ +/* The list_of_error_msg_tables contains a list of pointers to the */ +/* different tables of error message body texts (one table per error type). */ +/* This variable is used to access the correct table for the error type */ +/* that has occurred. */ +/* */ + + +local ERROR_MESSAGE_RECORD * list_of_error_msg_tables[] = + +{ + srb_error_msg_table , + open_error_msg_table , + data_xfer_error_msg_table , + driver_error_msg_table , + hwi_error_msg_table , + bring_up_error_msg_table , + init_error_msg_table , + auto_open_error_msg_table , + adapter_error_msg_table , + pcmcia_cs_error_msg_table +}; + +#endif + +/* */ +/* */ +/************** End of FTK_TAB.H file ***************************************/ +/* */ +/* */ diff --git a/private/ntos/ndis/madge/driver/head_def/ftk_user.h b/private/ntos/ndis/madge/driver/head_def/ftk_user.h new file mode 100644 index 000000000..09f85c8b5 --- /dev/null +++ b/private/ntos/ndis/madge/driver/head_def/ftk_user.h @@ -0,0 +1,666 @@ +/****************************************************************************/ +/****************************************************************************/ +/* */ +/* THE USER DEFINITIONS */ +/* ==================== */ +/* */ +/* FTK_USER.H : Part of the FASTMAC TOOL-KIT (FTK) */ +/* */ +/* Copyright (c) Madge Networks Ltd. 1991-1994 */ +/* Developed by MF */ +/* CONFIDENTIAL */ +/* */ +/* */ +/****************************************************************************/ +/* */ +/* This header file contains ALL the definitions and structures required by */ +/* any user of the FTK driver. Any user of the FTK need only include this */ +/* definitions header file in order to use the FTK. */ +/* */ +/* IMPORTANT : Some structures used within the FTK need to be packed in */ +/* order to work correctly. This means sizeof(STRUCTURE) will give the real */ +/* size in bytes, and if a structure contains sub-structures there will be */ +/* no spaces between the sub-structures. */ +/* */ +/****************************************************************************/ + +/****************************************************************************/ +/* */ +/* VERSION_NUMBER of FTK to which this FTK_USER.H belongs : */ +/* */ + +#define FTK_VERSION_NUMBER_FTK_USER_H 221 + + +/****************************************************************************/ +/* */ +/* TYPEDEFs for all structures defined within this header file : */ +/* */ + +typedef struct STRUCT_NODE_ADDRESS NODE_ADDRESS; +typedef union UNION_MULTI_ADDRESS MULTI_ADDRESS; +typedef struct STRUCT_STATUS_INFORMATION STATUS_INFORMATION; +typedef struct STRUCT_ERROR_LOG ERROR_LOG; +typedef struct STRUCT_PROBE PROBE; +typedef struct STRUCT_PREPARE_ARGS PREPARE_ARGS, *PPREPARE_ARGS; +typedef struct STRUCT_START_ARGS START_ARGS, *PSTART_ARGS; +typedef struct STRUCT_TR_OPEN_DATA TR_OPEN_DATA, *PTR_OPEN_DATA; + + +/****************************************************************************/ +/* */ +/* Function declarations */ +/* */ +/* Routines in the FTK are either local to a module, or they are exported. */ +/* Exported routines are entry points to the user of a module and the */ +/* routine has an 'extern' definition in an appropriate header file (see */ +/* FTK_INTR.H and FTK_EXTR.H). A user of the FTK may wish to follow this */ +/* method of function declarations using the following definitions. */ +/* */ + +#define local static +#define export + + +/****************************************************************************/ +/* */ +/* Basic types : BYTE, WORD, DWORD and BOOLEAN */ +/* */ +/* The basic types used throughout the FTK, and for passing parameters to */ +/* it, are BYTE (8 bit unsigned), WORD (16 bit unsigned), DWORD (32 bit */ +/* unsigned) and BOOLEAN (16 bit unsigned). A BOOLEAN variable should take */ +/* the value TRUE or FALSE. */ +/* */ +/* Note that none of the FTK code makes an explicit check for the value */ +/* TRUE (it only checks for FALSE which must be zero) and hence TRUE can */ +/* have any non-zero value. */ +/* */ + +typedef unsigned char BYTE; /* 8 bits */ + +typedef unsigned short int WORD; /* 16 bits */ + +typedef unsigned long int DWORD; /* 32 bits */ + +typedef unsigned long int ULONG; + +typedef WORD WBOOLEAN; + +typedef unsigned int UINT; + +#define VOID void + +#define FALSE 0 +#define TRUE 1 + +#if !defined(max) +#define max(a,b) ((a) < (b) ? (b) : (a)) +#endif + +#if !defined(min) +#define min(a,b) ((a) < (b) ? (a) : (b)) +#endif + + +#ifdef FMPLUS + +/****************************************************************************/ +/* */ +/* Variables : Fmplus download image */ +/* */ +/* The following variables are exported by FMPLUS.C which contains the */ +/* binary image for FastmacPlus in a 'C' format BYTE array. These variables */ +/* will be needed by a user of the FTK in order to download Fastmac */ +/* Plus (fmplus_image), display the Fastmac Plus version number and */ +/* copyright message (fmplus_version and fmplus_copyright_msg) and check */ +/* that the FTK version number is that required by Fastmac */ +/* (ftk_version_for_fmplus). The variables concerned with the size of the */ +/* Fastmac Plus binary (sizeof_fmplus_array and recorded_size_fmplus_array) */ +/* can be used to check for corruption of the Fasmtac image array. The */ +/* checksum byte (fmplus_checksum) can also be used for this purpose. */ +/* */ + +extern BYTE fmplus_image[]; + +extern char fmplus_version[]; + +extern char fmplus_copyright_msg[]; + +extern WORD ftk_version_for_fmplus; + +extern WORD sizeof_fmplus_array; + +extern WORD recorded_size_fmplus_array; + +extern BYTE fmplus_checksum; + +#else + +/****************************************************************************/ +/* */ +/* Variables : Fastmac download image */ +/* */ +/* The following variables are exported by FASTMAC.C which contains the */ +/* binary image for Fastmac in a 'C' format BYTE array. These variables */ +/* will be needed by a user of the FTK in order to download Fastmac */ +/* (fastmac_image), display the Fastmac version number and copyright */ +/* message (fastmac_version and fastmac_copyright_msg) and check that the */ +/* FTK version number is that required by Fastmac */ +/* (ftk_version_for_fastmac). The variables concerned with the size of the */ +/* Fastmac binary (sizeof_fastmac_array and recorded_size_fastmac_array) */ +/* can be used to check for corruption of the Fasmtac image array. The */ +/* checksum byte (fastmac_checksum) can also be used for this purpose. */ +/* */ + +extern BYTE fastmac_image[]; + +extern WORD fastmac_version; + +extern char fastmac_copyright_msg[]; + +extern WORD ftk_version_for_fastmac; + +extern WORD sizeof_fastmac_array; + +extern WORD recorded_size_fastmac_array; + +extern BYTE fastmac_checksum; + +#endif + +/****************************************************************************/ +/* */ +/* Values : Pointers */ +/* */ +/* For a near pointer, (one that points to a location in DGROUP), the value */ +/* NULL (must equal 0) is used to specify that it is yet to be assigned or */ +/* an attempt to assign to it was unsuccessful. For example, an attempt to */ +/* allocate memory via a system specific call to which a near pointer is to */ +/* point, eg. sys_alloc_init_block, should return NULL if unsuccessful. */ +/* Similarly, when a DWORD is used as a pointer to a 32 bit physical */ +/* address pointer, the value NULL_PHYSADDR (must equal 0L) is used. It */ +/* should be returned by sys_alloc fastmac buffer routines if unsuccessful. */ +/* */ + +#if !defined(NULL) +#define NULL 0 +#endif + +#define NULL_PHYSADDR 0L + + +/****************************************************************************/ +/* */ +/* Type : ADAPTER_HANDLE */ +/* */ +/* An element of this type is returned by driver_prepare_adapter in order */ +/* to identify a particular adapter for all subsequent calls to the driver */ +/* module of the FTK. */ +/* */ + +typedef WORD ADAPTER_HANDLE; + + +/****************************************************************************/ +/* */ +/* Type : DOWNLOAD_IMAGE */ +/* */ +/* A pointer to a download image must be supplied by the user to */ +/* driver_prepare_adapter. This download image should be Fastmac. */ +/* */ + +typedef BYTE DOWNLOAD_IMAGE; + + +/****************************************************************************/ +/* */ +/* The following structures represent data strcutures on the adapter and */ +/* must be byte packed. */ +/* */ + +#pragma pack(1) + + +/****************************************************************************/ +/* */ +/* Structure type : NODE_ADDRESS */ +/* */ +/* A node address may be supplied by the user to driver_prepare_adapter or */ +/* driver_open_adapter. The permanent node address of the adapter is */ +/* returned by driver_start_adapter. A node address is a 6 byte value. For */ +/* Madge adapters the bytes would be 0x00, 0x00, 0xF6, ... etc. */ +/* */ + +struct STRUCT_NODE_ADDRESS + { + BYTE byte[6]; + }; + + +/****************************************************************************/ +/* */ +/* Union type : MULTI_ADDRESS */ +/* */ +/* A multicast address may be supplied by the user to */ +/* driver_set_group_address or driver_set_functional_address. The */ +/* multicast address is the final 4 bytes of a 6 byte node address. The */ +/* first 2 bytes are determined by whether it is a group address or a */ +/* functional address. */ +/* */ + +union UNION_MULTI_ADDRESS + { + DWORD all; + BYTE byte[4]; + }; + + +/****************************************************************************/ +/* */ +/* Type : LONG_ADDRESS */ +/* */ +/* A LONG_ADDRESS is a 64 bit address. Some architectures (e.g. Alpha) use */ +/* 64 bit physical addresses. */ +/* */ + +union STRUCT_LONG_ADDRESS + { + BYTE bytes[8]; + WORD words[4]; + DWORD dwords[2]; + }; + +typedef union STRUCT_LONG_ADDRESS LONG_ADDRESS; + + +/****************************************************************************/ +/* */ +/* Structure type : TR_OPEN_DATA */ +/* */ +/* The TR_OPEN_DATA structure is used to pass to the Open SRB and to the */ +/* driver_start_adapter functions all the addressing details that could */ +/* usefully set. This is especially useful for restoring the card to a */ +/* prior state after a reset. */ +/* */ + +typedef struct STRUCT_TR_OPEN_DATA + { + WORD open_options; + NODE_ADDRESS opening_node_address; + ULONG group_address; + ULONG functional_address; + }; + + +/****************************************************************************/ +/* */ +/* Structure type : ERROR_LOG */ +/* */ +/* This is part of the information returned by a call to */ +/* driver_get_adapter_status. The error log contains the information from a */ +/* READ_ERROR_LOG SRB call. All the MAC level error counters are reset to */ +/* zero after they are read. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-112 MAC 000A READ.ERROR.LOG Command */ +/* */ + +struct STRUCT_ERROR_LOG + { + BYTE line_errors; + BYTE reserved_1; + BYTE burst_errors; + BYTE ari_fci_errors; + BYTE reserved_2; + BYTE reserved_3; + BYTE lost_frame_errors; + BYTE congestion_errors; + BYTE frame_copied_errors; + BYTE reserved_4; + BYTE token_errors; + BYTE reserved_5; + BYTE dma_bus_errors; + BYTE dma_parity_errors; + }; + + +/****************************************************************************/ +/* */ +/* Structure type : STATUS_INFORMATION */ +/* */ +/* The status information returned by a call to driver_get_status */ +/* includes whether the adapter is currently open, the current ring status */ +/* and the MAC level error log information. */ +/* */ + +struct STRUCT_STATUS_INFORMATION + { + WBOOLEAN adapter_open; + WORD ring_status; + ERROR_LOG error_log; + }; + + +/****************************************************************************/ +/* */ +/* Values : STATUS_INFORMATION - WORD ring_status */ +/* */ +/* These are the possible ring status values returned by a call to */ +/* driver_get_adapter_status. */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-61 4.12.2 RING.STATUS */ +/* */ + +#define RING_STATUS_SIGNAL_LOSS 0x8000 +#define RING_STATUS_HARD_ERROR 0x4000 +#define RING_STATUS_SOFT_ERROR 0x2000 +#define RING_STATUS_TRANSMIT_BEACON 0x1000 +#define RING_STATUS_LOBE_FAULT 0x0800 +#define RING_STATUS_AUTO_REMOVAL 0x0400 +#define RING_STATUS_REMOVE_RECEIVED 0x0100 +#define RING_STATUS_COUNTER_OVERFLOW 0x0080 +#define RING_STATUS_SINGLE_STATION 0x0040 +#define RING_STATUS_RING_RECOVERY 0x0020 + + +/****************************************************************************/ +/* */ +/* Values : WORD open_options */ +/* */ +/* The open_options parameter to driver_prepare_adapter and */ +/* driver_open_adapter has the following bit fields defined. */ +/* */ +/* WARNING : The FORCE_OPEN option is a special Fastmac option that will */ +/* open an adapter onto any ring - even if the adapter and ring speed do */ +/* not match! Use it with caution. */ +/* */ +/* REFERENCE : The Madge Fastmac Interface Specification */ +/* - SRB Interface : Open Adapter SRB */ +/* */ +/* REFERENCE : The TMS 380 Second-Generation Token_Ring User's Guide */ +/* by Texas Instruments */ +/* 4-71 MAC 0003 OPEN command */ +/* */ + +#define OPEN_OPT_WRAP_INTERFACE 0x8000 +#define OPEN_OPT_DISABLE_SOFT_ERROR 0x4000 +#define OPEN_OPT_DISABLE_HARD_ERROR 0x2000 +#define OPEN_OPT_PASS_ADAPTER_MACS 0x1000 +#define OPEN_OPT_PASS_ATTENTION_MACS 0x0800 +#define OPEN_OPT_FORCE_OPEN 0x0400 /* Fastmac only */ +#define OPEN_OPT_CONTENDER 0x0100 +#define OPEN_OPT_PASS_BEACON_MACS 0x0080 +#define OPEN_OPT_EARLY_TOKEN_RELEASE 0x0010 +#define OPEN_OPT_COPY_ALL_MACS 0x0004 +#define OPEN_OPT_COPY_ALL_LLCS 0x0002 + + +/****************************************************************************/ +/* */ +/* Values : WORD adapter_card_bus_type */ +/* */ +/* The following adapter card bus types are defined and can be passed to */ +/* driver_start_adapter. Different adapter card bus types apply to */ +/* different adapter cards : */ +/* */ +/* ADAPTER_CARD_ISA_BUS_TYPE 16/4 PC or 16/4 AT */ +/* ADAPTER_CARD_MC_BUS_TYPE 16/4 MC or 16/4 MC 32 */ +/* ADAPTER_CARD_EISA_BUS_TYPE 16/4 EISA mk1 or mk2 */ +/* */ + +#define ADAPTER_CARD_ATULA_BUS_TYPE 1 +#define ADAPTER_CARD_MC_BUS_TYPE 2 +#define ADAPTER_CARD_EISA_BUS_TYPE 3 +#define ADAPTER_CARD_PCI_BUS_TYPE 4 +#define ADAPTER_CARD_SMART16_BUS_TYPE 5 +#define ADAPTER_CARD_PCMCIA_BUS_TYPE 6 +#define ADAPTER_CARD_PNP_BUS_TYPE 7 +#define ADAPTER_CARD_TI_PCI_BUS_TYPE 8 +#define ADAPTER_CARD_PCI2_BUS_TYPE 9 + + +/****************************************************************************/ +/* */ +/* Values : WORD transfer_mode, WORD interrupt_number */ +/* */ +/* If POLLING_INTERRUPTS_MODE is given as the interrupt number to */ +/* driver_start_adapter, then polling is assumed to be used. */ +/* */ +/* NOTE : If using the DOS example system specific code, then note that */ +/* PIO_DATA_TRANSFER_MODE is defined in SYS_IRQ.ASM and SYS_DMA.ASM */ +/* resepctively. The value used here must be, and is, identical. */ +/* */ + +#define PIO_DATA_TRANSFER_MODE 0 +#define DMA_DATA_TRANSFER_MODE 1 +#define MMIO_DATA_TRANSFER_MODE 2 +#define POLLING_INTERRUPTS_MODE 0 + + +/****************************************************************************/ +/* */ +/* Values : Returned from driver_transmit_frame (or some such) */ +/* */ +/* The value returned by driver_transmit_frame indicates how far the code */ +/* got with transmitting the frame. FAIL and SUCCEED are obvious, WAIT */ +/* means that the caller should not assume the frame has been transmitted */ +/* until some later indication. */ +/* */ + +#define DRIVER_TRANSMIT_FAIL 0 +#define DRIVER_TRANSMIT_WAIT 1 +#define DRIVER_TRANSMIT_SUCCEED 2 + + +/****************************************************************************/ +/* */ +/* Values : Returned from user_receive_frame */ +/* */ +/* The value returned by a call to the user_receive_frame routine indicates */ +/* whether the user wishes to keep the frame in the Fastmac buffer or has */ +/* dealt with it (decided it can be thrown away or copied it elsewhere). In */ +/* the latter case the frame can be removed from the Fastmac receive */ +/* buffer. */ +/* */ + +#define DO_NOT_KEEP_FRAME 0 +#define KEEP_FRAME 1 + + +/****************************************************************************/ +/* */ +/* Type : card_t */ +/* */ +/* To support large model compilation, certain type casts have to be made */ +/* to evade compilation errors. The card_t type is used to convert pointers */ +/* to structures on the adapter card into unsigned integers so that they */ +/* can be truncated to 16 bits without warnings. */ +/* */ +/* */ + +typedef DWORD card_t; + + +/****************************************************************************/ +/* */ +/* The following structures do not need to be byte packed. */ +/* */ + +#pragma pack() + + +/****************************************************************************/ +/* */ +/* Values : PROBE_FAILURE */ +/* */ +/* This value is returned by the driver_probe_adapter function if an error */ +/* occurs. */ +/* */ + +#define PROBE_FAILURE 0xffff + + +/****************************************************************************/ +/* */ +/* Values : FTK_UNDEFINED */ +/* */ +/* This value means that a value is not defined or not used. */ +/* */ + +#define FTK_UNDEFINED 0xeeff + + +/****************************************************************************/ +/* */ +/* Structure type : PROBE */ +/* */ +/* The probe structure can be filled in with card details by a call to */ +/* driver_probe_adapter. This is the way the user of the FTK should obtain */ +/* hardware resource information (DMA channel, IRQ number etc) about an */ +/* adapter before calling driver_prepare_adapter and driver_start_adapter. */ +/* */ + +struct STRUCT_PROBE +{ + WORD socket; + UINT adapter_card_bus_type; + UINT adapter_card_type; + UINT adapter_card_revision; + UINT adapter_ram_size; + WORD io_location; + WORD interrupt_number; + WORD dma_channel; + UINT transfer_mode; + DWORD mmio_base_address; + DWORD pci_handle; +}; + + +/****************************************************************************/ +/* */ +/* Types : PREPARE_ARGS */ +/* */ +/* The driver_prepare_adapter function takes a collection of arguments. An */ +/* instance of this structure is used to pass the arguments. */ +/* */ + +typedef struct STRUCT_PREPARE_ARGS +{ + /* User's private information, not interpreted by the FTK. */ + + void * user_information; + +#ifdef FMPLUS + + /* Number of FastMAC Plus receive and transmit slots. */ + + WORD number_of_rx_slots; + WORD number_of_tx_slots; + +#else + + /* Size of the FastMAC receive and transmit buffers. */ + + WORD receive_buffer_byte_size; + WORD transmit_buffer_byte_size; + +#endif + + /* Requested maximum frame size. */ + + WORD max_frame_size; + +}; + + +/****************************************************************************/ +/* */ +/* Types : START_ARGS */ +/* */ +/* The driver_start_adapter function takes a collection of arguments. An */ +/* instance of this structure is used to pass the arguments. Note that some */ +/* of the structure fields are filled in on return from */ +/* driver_start_adapter. */ +/* */ + +typedef struct STRUCT_START_ARGS +{ + /* Adapter family. */ + + UINT adapter_card_bus_type; + + /* Hardware resource details. */ + +#ifdef PCMCIA_POINT_ENABLE + UINT socket; +#endif + WORD io_location; + WORD dma_channel; + UINT transfer_mode; + WORD interrupt_number; + + /* Override DMA/IRQ values on soft programmable adapters? */ + + WBOOLEAN set_dma_channel; + WBOOLEAN set_interrupt_number; + + /* Force ring speed to this if possible. 4, 16 or 0 for default. */ + + UINT set_ring_speed; + + /* Base Address for MMIO */ + + DWORD mmio_base_address; + + /* + * Used for the Ti PCI ASIC which in hwi_install needs to access PCI + * Config space. + */ + + DWORD pci_handle; + + /* Actual maximum frame size. Set on return. */ + + WORD max_frame_size; + + /* Auto open the adapter? */ + + WBOOLEAN auto_open_option; + + /* Open options and addresses for auto open mode. If + opening_node_address == 000000000000 the the BIA address + is used. */ + + WORD open_options; + + NODE_ADDRESS opening_node_address; + ULONG opening_group_address; + ULONG opening_functional_address; + + /* Pointer to the adapter download image. */ + + DOWNLOAD_IMAGE * code; + + /* The open status of the adapter on return. */ + + UINT open_status; + +#ifdef FMPLUS + + /* Size of the RX/TX buffers on the adapter. */ + + WORD rx_tx_buffer_size; + +#endif + +}; + + +/* */ +/* */ +/************** End of FTK_USER.H file **************************************/ +/* */ +/* */ |