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author | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
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committer | Adam <you@example.com> | 2020-05-17 05:51:50 +0200 |
commit | e611b132f9b8abe35b362e5870b74bce94a1e58e (patch) | |
tree | a5781d2ec0e085eeca33cf350cf878f2efea6fe5 /public/sdk/inc/ntconfig.h | |
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Diffstat (limited to 'public/sdk/inc/ntconfig.h')
-rw-r--r-- | public/sdk/inc/ntconfig.h | 842 |
1 files changed, 842 insertions, 0 deletions
diff --git a/public/sdk/inc/ntconfig.h b/public/sdk/inc/ntconfig.h new file mode 100644 index 000000000..7583cb956 --- /dev/null +++ b/public/sdk/inc/ntconfig.h @@ -0,0 +1,842 @@ +/*++ BUILD Version: 0002 // Increment this if a change has global effects + +Copyright (c) 1992-1993 Microsoft Corporation + +Module Name: + + ntconfig.h + +Abstract: + + This module contains the definitions associated with the conventions + used to access the configuration registry. + +Author: + + Andre Vachon (andreva) 17-Apr-1992 + +Revision History: + + 28-Apr-1992 JohnRo + Made changes to be consistent with win32 service controller APIs. +--*/ + +#ifndef _NTCONFIG_ +#define _NTCONFIG_ + +// begin_ntddk begin_nthal +// begin_winnt +// +// Predefined Value Types. +// + +#define REG_NONE ( 0 ) // No value type +#define REG_SZ ( 1 ) // Unicode nul terminated string +#define REG_EXPAND_SZ ( 2 ) // Unicode nul terminated string + // (with environment variable references) +#define REG_BINARY ( 3 ) // Free form binary +#define REG_DWORD ( 4 ) // 32-bit number +#define REG_DWORD_LITTLE_ENDIAN ( 4 ) // 32-bit number (same as REG_DWORD) +#define REG_DWORD_BIG_ENDIAN ( 5 ) // 32-bit number +#define REG_LINK ( 6 ) // Symbolic Link (unicode) +#define REG_MULTI_SZ ( 7 ) // Multiple Unicode strings +#define REG_RESOURCE_LIST ( 8 ) // Resource list in the resource map +#define REG_FULL_RESOURCE_DESCRIPTOR ( 9 ) // Resource list in the hardware description +#define REG_RESOURCE_REQUIREMENTS_LIST ( 10 ) + +// end_ntddk end_nthal + +// begin_ntddk begin_nthal +// +// Service Types (Bit Mask) +// +#define SERVICE_KERNEL_DRIVER 0x00000001 +#define SERVICE_FILE_SYSTEM_DRIVER 0x00000002 +#define SERVICE_ADAPTER 0x00000004 +#define SERVICE_RECOGNIZER_DRIVER 0x00000008 + +#define SERVICE_DRIVER (SERVICE_KERNEL_DRIVER | \ + SERVICE_FILE_SYSTEM_DRIVER | \ + SERVICE_RECOGNIZER_DRIVER) + +#define SERVICE_WIN32_OWN_PROCESS 0x00000010 +#define SERVICE_WIN32_SHARE_PROCESS 0x00000020 +#define SERVICE_WIN32 (SERVICE_WIN32_OWN_PROCESS | \ + SERVICE_WIN32_SHARE_PROCESS) + +#define SERVICE_INTERACTIVE_PROCESS 0x00000100 + +#define SERVICE_TYPE_ALL (SERVICE_WIN32 | \ + SERVICE_ADAPTER | \ + SERVICE_DRIVER | \ + SERVICE_INTERACTIVE_PROCESS) + +// +// Start Type +// + +#define SERVICE_BOOT_START 0x00000000 +#define SERVICE_SYSTEM_START 0x00000001 +#define SERVICE_AUTO_START 0x00000002 +#define SERVICE_DEMAND_START 0x00000003 +#define SERVICE_DISABLED 0x00000004 + +// +// Error control type +// +#define SERVICE_ERROR_IGNORE 0x00000000 +#define SERVICE_ERROR_NORMAL 0x00000001 +#define SERVICE_ERROR_SEVERE 0x00000002 +#define SERVICE_ERROR_CRITICAL 0x00000003 + +// +// +// Define the registry driver node enumerations +// + +typedef enum _CM_SERVICE_NODE_TYPE { + DriverType = SERVICE_KERNEL_DRIVER, + FileSystemType = SERVICE_FILE_SYSTEM_DRIVER, + Win32ServiceOwnProcess = SERVICE_WIN32_OWN_PROCESS, + Win32ServiceShareProcess = SERVICE_WIN32_SHARE_PROCESS, + AdapterType = SERVICE_ADAPTER, + RecognizerType = SERVICE_RECOGNIZER_DRIVER +} SERVICE_NODE_TYPE; + +typedef enum _CM_SERVICE_LOAD_TYPE { + BootLoad = SERVICE_BOOT_START, + SystemLoad = SERVICE_SYSTEM_START, + AutoLoad = SERVICE_AUTO_START, + DemandLoad = SERVICE_DEMAND_START, + DisableLoad = SERVICE_DISABLED +} SERVICE_LOAD_TYPE; + +typedef enum _CM_ERROR_CONTROL_TYPE { + IgnoreError = SERVICE_ERROR_IGNORE, + NormalError = SERVICE_ERROR_NORMAL, + SevereError = SERVICE_ERROR_SEVERE, + CriticalError = SERVICE_ERROR_CRITICAL +} SERVICE_ERROR_TYPE; + +// end_winnt +// end_ntddk end_nthal + +// begin_ntddk begin_nthal + +// +// Resource List definitions +// + +// begin_ntminiport begin_ntndis + +// +// Defines the Type in the RESOURCE_DESCRIPTOR +// + +typedef enum _CM_RESOURCE_TYPE { + CmResourceTypeNull = 0, // Reserved + CmResourceTypePort, + CmResourceTypeInterrupt, + CmResourceTypeMemory, + CmResourceTypeDma, + CmResourceTypeDeviceSpecific, + CmResourceTypeMaximum +} CM_RESOURCE_TYPE; + +// +// Defines the ShareDisposition in the RESOURCE_DESCRIPTOR +// + +typedef enum _CM_SHARE_DISPOSITION { + CmResourceShareUndetermined = 0, // Reserved + CmResourceShareDeviceExclusive, + CmResourceShareDriverExclusive, + CmResourceShareShared +} CM_SHARE_DISPOSITION; + +// +// Define the bit masks for Flags when type is CmResourceTypeInterrupt +// + +#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0 +#define CM_RESOURCE_INTERRUPT_LATCHED 1 + +// +// Define the bit masks for Flags when type is CmResourceTypeMemory +// + +#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000 +#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001 +#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002 +#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004 + +#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008 +#define CM_RESOURCE_MEMORY_24 0x0010 + +// +// Define the bit masks for Flags when type is CmResourceTypePort +// + +#define CM_RESOURCE_PORT_MEMORY 0 +#define CM_RESOURCE_PORT_IO 1 + +// +// Define the bit masks for Flags when type is CmResourceTypeDma +// + +#define CM_RESOURCE_DMA_8 0x0000 +#define CM_RESOURCE_DMA_16 0x0001 +#define CM_RESOURCE_DMA_32 0x0002 + +// end_ntminiport end_ntndis + +// +// This structure defines one type of resource used by a driver. +// +// There can only be *1* DeviceSpecificData block. It must be located at +// the end of all resource descriptors in a full descriptor block. +// + +// +// BUGBUG Make sure alignment is made properly by compiler; otherwise move +// flags back to the top of the structure (common to all members of the +// union). +// +// begin_ntndis + +#include "pshpack4.h" +typedef struct _CM_PARTIAL_RESOURCE_DESCRIPTOR { + UCHAR Type; + UCHAR ShareDisposition; + USHORT Flags; + union { + + // + // Range of port numbers, inclusive. These are physical, bus + // relative. The value should be the same as the one passed to + // HalTranslateBusAddress(). + // + + struct { + PHYSICAL_ADDRESS Start; + ULONG Length; + } Port; + + // + // IRQL and vector. Should be same values as were passed to + // HalGetInterruptVector(). + // + + struct { + ULONG Level; + ULONG Vector; + ULONG Affinity; + } Interrupt; + + // + // Range of memory addresses, inclusive. These are physical, bus + // relative. The value should be the same as the one passed to + // HalTranslateBusAddress(). + // + + struct { + PHYSICAL_ADDRESS Start; // 64 bit physical addresses. + ULONG Length; + } Memory; + + // + // Physical DMA channel. + // + + struct { + ULONG Channel; + ULONG Port; + ULONG Reserved1; + } Dma; + + // + // Device Specific information defined by the driver. + // The DataSize field indicates the size of the data in bytes. The + // data is located immediately after the DeviceSpecificData field in + // the structure. + // + + struct { + ULONG DataSize; + ULONG Reserved1; + ULONG Reserved2; + } DeviceSpecificData; + } u; +} CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR; +#include "poppack.h" + +// +// A Partial Resource List is what can be found in the ARC firmware +// or will be generated by ntdetect.com. +// The configuration manager will transform this structure into a Full +// resource descriptor when it is about to store it in the regsitry. +// +// Note: There must a be a convention to the order of fields of same type, +// (defined on a device by device basis) so that the fields can make sense +// to a driver (i.e. when multiple memory ranges are necessary). +// + +typedef struct _CM_PARTIAL_RESOURCE_LIST { + USHORT Version; + USHORT Revision; + ULONG Count; + CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1]; +} CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST; + +// +// A Full Resource Descriptor is what can be found in the registry. +// This is what will be returned to a driver when it queries the registry +// to get device information; it will be stored under a key in the hardware +// description tree. +// +// Note: The BusNumber and Type are redundant information, but we will keep +// it since it allows the driver _not_ to append it when it is creating +// a resource list which could possibly span multiple buses. +// +// Note2: There must a be a convention to the order of fields of same type, +// (defined on a device by device basis) so that the fields can make sense +// to a driver (i.e. when multiple memory ranges are necessary). +// + +typedef struct _CM_FULL_RESOURCE_DESCRIPTOR { + INTERFACE_TYPE InterfaceType; + ULONG BusNumber; + CM_PARTIAL_RESOURCE_LIST PartialResourceList; +} CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR; + +// +// The Resource list is what will be stored by the drivers into the +// resource map via the IO API. +// + +typedef struct _CM_RESOURCE_LIST { + ULONG Count; + CM_FULL_RESOURCE_DESCRIPTOR List[1]; +} CM_RESOURCE_LIST, *PCM_RESOURCE_LIST; + +// end_ntndis +// +// Define the structures used to interpret configuration data of +// \\Registry\machine\hardware\description tree. +// Basically, these structures are used to interpret component +// sepcific data. +// + +// +// Define DEVICE_FLAGS +// + +typedef struct _DEVICE_FLAGS { + ULONG Failed : 1; + ULONG ReadOnly : 1; + ULONG Removable : 1; + ULONG ConsoleIn : 1; + ULONG ConsoleOut : 1; + ULONG Input : 1; + ULONG Output : 1; +} DEVICE_FLAGS, *PDEVICE_FLAGS; + +// +// Define Component Information structure +// + +typedef struct _CM_COMPONENT_INFORMATION { + DEVICE_FLAGS Flags; + ULONG Version; + ULONG Key; + ULONG AffinityMask; +} CM_COMPONENT_INFORMATION, *PCM_COMPONENT_INFORMATION; + +// end_ntddk end_nthal + +// begin_ntddk begin_nthal +// +// The following structures are used to interpret x86 +// DeviceSpecificData of CM_PARTIAL_RESOURCE_DESCRIPTOR. +// (Most of the structures are defined by BIOS. They are +// not aligned on word (or dword) boundary. +// + +// +// Define the Rom Block structure +// + +typedef struct _CM_ROM_BLOCK { + ULONG Address; + ULONG Size; +} CM_ROM_BLOCK, *PCM_ROM_BLOCK; + +// begin_ntminiport begin_ntndis + +#include "pshpack1.h" + +// end_ntminiport end_ntndis + +// +// Define INT13 driver parameter block +// + +typedef struct _CM_INT13_DRIVE_PARAMETER { + USHORT DriveSelect; + ULONG MaxCylinders; + USHORT SectorsPerTrack; + USHORT MaxHeads; + USHORT NumberDrives; +} CM_INT13_DRIVE_PARAMETER, *PCM_INT13_DRIVE_PARAMETER; + +// begin_ntminiport begin_ntndis + +// +// Define Mca POS data block for slot +// + +typedef struct _CM_MCA_POS_DATA { + USHORT AdapterId; + UCHAR PosData1; + UCHAR PosData2; + UCHAR PosData3; + UCHAR PosData4; +} CM_MCA_POS_DATA, *PCM_MCA_POS_DATA; + +// +// Memory configuration of eisa data block structure +// + +typedef struct _EISA_MEMORY_TYPE { + UCHAR ReadWrite: 1; + UCHAR Cached : 1; + UCHAR Reserved0 :1; + UCHAR Type:2; + UCHAR Shared:1; + UCHAR Reserved1 :1; + UCHAR MoreEntries : 1; +} EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE; + +typedef struct _EISA_MEMORY_CONFIGURATION { + EISA_MEMORY_TYPE ConfigurationByte; + UCHAR DataSize; + USHORT AddressLowWord; + UCHAR AddressHighByte; + USHORT MemorySize; +} EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION; + + +// +// Interrupt configurationn of eisa data block structure +// + +typedef struct _EISA_IRQ_DESCRIPTOR { + UCHAR Interrupt : 4; + UCHAR Reserved :1; + UCHAR LevelTriggered :1; + UCHAR Shared : 1; + UCHAR MoreEntries : 1; +} EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR; + +typedef struct _EISA_IRQ_CONFIGURATION { + EISA_IRQ_DESCRIPTOR ConfigurationByte; + UCHAR Reserved; +} EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION; + + +// +// DMA description of eisa data block structure +// + +typedef struct _DMA_CONFIGURATION_BYTE0 { + UCHAR Channel : 3; + UCHAR Reserved : 3; + UCHAR Shared :1; + UCHAR MoreEntries :1; +} DMA_CONFIGURATION_BYTE0; + +typedef struct _DMA_CONFIGURATION_BYTE1 { + UCHAR Reserved0 : 2; + UCHAR TransferSize : 2; + UCHAR Timing : 2; + UCHAR Reserved1 : 2; +} DMA_CONFIGURATION_BYTE1; + +typedef struct _EISA_DMA_CONFIGURATION { + DMA_CONFIGURATION_BYTE0 ConfigurationByte0; + DMA_CONFIGURATION_BYTE1 ConfigurationByte1; +} EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION; + + +// +// Port description of eisa data block structure +// + +typedef struct _EISA_PORT_DESCRIPTOR { + UCHAR NumberPorts : 5; + UCHAR Reserved :1; + UCHAR Shared :1; + UCHAR MoreEntries : 1; +} EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR; + +typedef struct _EISA_PORT_CONFIGURATION { + EISA_PORT_DESCRIPTOR Configuration; + USHORT PortAddress; +} EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION; + + +// +// Eisa slot information definition +// N.B. This structure is different from the one defined +// in ARC eisa addendum. +// + +typedef struct _CM_EISA_SLOT_INFORMATION { + UCHAR ReturnCode; + UCHAR ReturnFlags; + UCHAR MajorRevision; + UCHAR MinorRevision; + USHORT Checksum; + UCHAR NumberFunctions; + UCHAR FunctionInformation; + ULONG CompressedId; +} CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION; + + +// +// Eisa function information definition +// + +typedef struct _CM_EISA_FUNCTION_INFORMATION { + ULONG CompressedId; + UCHAR IdSlotFlags1; + UCHAR IdSlotFlags2; + UCHAR MinorRevision; + UCHAR MajorRevision; + UCHAR Selections[26]; + UCHAR FunctionFlags; + UCHAR TypeString[80]; + EISA_MEMORY_CONFIGURATION EisaMemory[9]; + EISA_IRQ_CONFIGURATION EisaIrq[7]; + EISA_DMA_CONFIGURATION EisaDma[4]; + EISA_PORT_CONFIGURATION EisaPort[20]; + UCHAR InitializationData[60]; +} CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION; + +// +// The followings define the way pnp bios information is stored in +// the registry \\HKEY_LOCAL_MACHINE\HARDWARE\Description\System\ +// MultifunctionAdapter\x key, where x is an integer number indicating +// adapter instance. The "Identifier" of the key must equal to "PNP BIOS" +// and the "ConfigurationData" is organized as follow: +// +// CM_PNP_BIOS_INSTALLATION_CHECK + +// CM_PNP_BIOS_DEVICE_NODE for device 1 + +// CM_PNP_BIOS_DEVICE_NODE for device 2 + +// ... +// CM_PNP_BIOS_DEVICE_NODE for device n +// + +// +// Pnp BIOS device node structure +// + +typedef struct _CM_PNP_BIOS_DEVICE_NODE { + USHORT Size; + UCHAR Node; + ULONG ProductId; + UCHAR DeviceType[3]; + USHORT DeviceAttributes; + // followed by AllocatedResourceBlock, PossibleResourceBlock + // and CompatibleDeviceId +} CM_PNP_BIOS_DEVICE_NODE,*PCM_PNP_BIOS_DEVICE_NODE; + +// +// Pnp BIOS Installation check +// + +typedef struct _CM_PNP_BIOS_INSTALLATION_CHECK { + UCHAR Signature[4]; // $PnP (ascii) + UCHAR Revision; + UCHAR Length; + USHORT ControlField; + UCHAR Checksum; + ULONG EventFlagAddress; // Physical address + USHORT RealModeEntryOffset; + USHORT RealModeEntrySegment; + USHORT ProtectedModeEntryOffset; + ULONG ProtectedModeCodeBaseAddress; + ULONG OemDeviceId; + USHORT RealModeDataBaseAddress; + ULONG ProtectedModeDataBaseAddress; +} CM_PNP_BIOS_INSTALLATION_CHECK, *PCM_PNP_BIOS_INSTALLATION_CHECK; + +#include "poppack.h" + +// +// Masks for EISA function information +// + +#define EISA_FUNCTION_ENABLED 0x80 +#define EISA_FREE_FORM_DATA 0x40 +#define EISA_HAS_PORT_INIT_ENTRY 0x20 +#define EISA_HAS_PORT_RANGE 0x10 +#define EISA_HAS_DMA_ENTRY 0x08 +#define EISA_HAS_IRQ_ENTRY 0x04 +#define EISA_HAS_MEMORY_ENTRY 0x02 +#define EISA_HAS_TYPE_ENTRY 0x01 +#define EISA_HAS_INFORMATION EISA_HAS_PORT_RANGE + \ + EISA_HAS_DMA_ENTRY + \ + EISA_HAS_IRQ_ENTRY + \ + EISA_HAS_MEMORY_ENTRY + \ + EISA_HAS_TYPE_ENTRY + +// +// Masks for EISA memory configuration +// + +#define EISA_MORE_ENTRIES 0x80 +#define EISA_SYSTEM_MEMORY 0x00 +#define EISA_MEMORY_TYPE_RAM 0x01 + +// +// Returned error code for EISA bios call +// + +#define EISA_INVALID_SLOT 0x80 +#define EISA_INVALID_FUNCTION 0x81 +#define EISA_INVALID_CONFIGURATION 0x82 +#define EISA_EMPTY_SLOT 0x83 +#define EISA_INVALID_BIOS_CALL 0x86 + +// end_ntminiport end_ntndis + +// +// The following structures are used to interpret mips +// DeviceSpecificData of CM_PARTIAL_RESOURCE_DESCRIPTOR. +// + +// +// Device data records for adapters. +// + +// +// The device data record for the Emulex SCSI controller. +// + +typedef struct _CM_SCSI_DEVICE_DATA { + USHORT Version; + USHORT Revision; + UCHAR HostIdentifier; +} CM_SCSI_DEVICE_DATA, *PCM_SCSI_DEVICE_DATA; + +// +// Device data records for controllers. +// + +// +// The device data record for the Video controller. +// + +typedef struct _CM_VIDEO_DEVICE_DATA { + USHORT Version; + USHORT Revision; + ULONG VideoClock; +} CM_VIDEO_DEVICE_DATA, *PCM_VIDEO_DEVICE_DATA; + +// +// The device data record for the SONIC network controller. +// + +typedef struct _CM_SONIC_DEVICE_DATA { + USHORT Version; + USHORT Revision; + USHORT DataConfigurationRegister; + UCHAR EthernetAddress[8]; +} CM_SONIC_DEVICE_DATA, *PCM_SONIC_DEVICE_DATA; + +// +// The device data record for the serial controller. +// + +typedef struct _CM_SERIAL_DEVICE_DATA { + USHORT Version; + USHORT Revision; + ULONG BaudClock; +} CM_SERIAL_DEVICE_DATA, *PCM_SERIAL_DEVICE_DATA; + +// +// Device data records for peripherals. +// + +// +// The device data record for the Monitor peripheral. +// + +typedef struct _CM_MONITOR_DEVICE_DATA { + USHORT Version; + USHORT Revision; + USHORT HorizontalScreenSize; + USHORT VerticalScreenSize; + USHORT HorizontalResolution; + USHORT VerticalResolution; + USHORT HorizontalDisplayTimeLow; + USHORT HorizontalDisplayTime; + USHORT HorizontalDisplayTimeHigh; + USHORT HorizontalBackPorchLow; + USHORT HorizontalBackPorch; + USHORT HorizontalBackPorchHigh; + USHORT HorizontalFrontPorchLow; + USHORT HorizontalFrontPorch; + USHORT HorizontalFrontPorchHigh; + USHORT HorizontalSyncLow; + USHORT HorizontalSync; + USHORT HorizontalSyncHigh; + USHORT VerticalBackPorchLow; + USHORT VerticalBackPorch; + USHORT VerticalBackPorchHigh; + USHORT VerticalFrontPorchLow; + USHORT VerticalFrontPorch; + USHORT VerticalFrontPorchHigh; + USHORT VerticalSyncLow; + USHORT VerticalSync; + USHORT VerticalSyncHigh; +} CM_MONITOR_DEVICE_DATA, *PCM_MONITOR_DEVICE_DATA; + +// +// The device data record for the Floppy peripheral. +// + +typedef struct _CM_FLOPPY_DEVICE_DATA { + USHORT Version; + USHORT Revision; + CHAR Size[8]; + ULONG MaxDensity; + ULONG MountDensity; + // + // New data fields for version >= 2.0 + // + UCHAR StepRateHeadUnloadTime; + UCHAR HeadLoadTime; + UCHAR MotorOffTime; + UCHAR SectorLengthCode; + UCHAR SectorPerTrack; + UCHAR ReadWriteGapLength; + UCHAR DataTransferLength; + UCHAR FormatGapLength; + UCHAR FormatFillCharacter; + UCHAR HeadSettleTime; + UCHAR MotorSettleTime; + UCHAR MaximumTrackValue; + UCHAR DataTransferRate; +} CM_FLOPPY_DEVICE_DATA, *PCM_FLOPPY_DEVICE_DATA; + +// +// The device data record for the Keyboard peripheral. +// The KeyboardFlags is defined (by x86 BIOS INT 16h, function 02) as: +// bit 7 : Insert on +// bit 6 : Caps Lock on +// bit 5 : Num Lock on +// bit 4 : Scroll Lock on +// bit 3 : Alt Key is down +// bit 2 : Ctrl Key is down +// bit 1 : Left shift key is down +// bit 0 : Right shift key is down +// + +typedef struct _CM_KEYBOARD_DEVICE_DATA { + USHORT Version; + USHORT Revision; + UCHAR Type; + UCHAR Subtype; + USHORT KeyboardFlags; +} CM_KEYBOARD_DEVICE_DATA, *PCM_KEYBOARD_DEVICE_DATA; + +// +// Declaration of the structure for disk geometries +// + +typedef struct _CM_DISK_GEOMETRY_DEVICE_DATA { + ULONG BytesPerSector; + ULONG NumberOfCylinders; + ULONG SectorsPerTrack; + ULONG NumberOfHeads; +} CM_DISK_GEOMETRY_DEVICE_DATA, *PCM_DISK_GEOMETRY_DEVICE_DATA; + +// begin_ntminiport + +// +// Defines Resource Options +// + +#define IO_RESOURCE_PREFERRED 0x01 +#define IO_RESOURCE_DEFAULT 0x02 +#define IO_RESOURCE_ALTERNATIVE 0x08 + + +// +// This structure defines one type of resource requested by the driver +// + +typedef struct _IO_RESOURCE_DESCRIPTOR { + UCHAR Option; + UCHAR Type; // use CM_RESOURCE_TYPE + UCHAR ShareDisposition; // use CM_SHARE_DISPOSITION + UCHAR Spare1; + USHORT Flags; // use CM resource flag defines + USHORT Spare2; // align + + union { + struct { + ULONG Length; + ULONG Alignment; + PHYSICAL_ADDRESS MinimumAddress; + PHYSICAL_ADDRESS MaximumAddress; + } Port; + + struct { + ULONG Length; + ULONG Alignment; + PHYSICAL_ADDRESS MinimumAddress; + PHYSICAL_ADDRESS MaximumAddress; + } Memory; + + struct { + ULONG MinimumVector; + ULONG MaximumVector; + } Interrupt; + + struct { + ULONG MinimumChannel; + ULONG MaximumChannel; + } Dma; + + } u; + +} IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR; + +// end_ntminiport + + +typedef struct _IO_RESOURCE_LIST { + USHORT Version; + USHORT Revision; + + ULONG Count; + IO_RESOURCE_DESCRIPTOR Descriptors[1]; +} IO_RESOURCE_LIST, *PIO_RESOURCE_LIST; + + +typedef struct _IO_RESOURCE_REQUIREMENTS_LIST { + ULONG ListSize; + INTERFACE_TYPE InterfaceType; + ULONG BusNumber; + ULONG SlotNumber; + ULONG Reserved[3]; + ULONG AlternativeLists; + IO_RESOURCE_LIST List[1]; +} IO_RESOURCE_REQUIREMENTS_LIST, *PIO_RESOURCE_REQUIREMENTS_LIST; + +// end_ntddk end_nthal + +#endif // _NTCONFIG_ |