1 files changed, 80 insertions, 0 deletions
diff --git a/private/ntos/nthals/halppc/ppc/pxnatsup.c b/private/ntos/nthals/halppc/ppc/pxnatsup.c
new file mode 100644
index 000000000..3da4d7182
--- /dev/null
+++ b/private/ntos/nthals/halppc/ppc/pxnatsup.c
@@ -0,0 +1,80 @@
+
+/*++
+
+Copyright (c) 1990  Microsoft Corporation
+
+Copyright (c) 1994 MOTOROLA, INC.  All Rights Reserved.  This file
+contains copyrighted material.  Use of this file is restricted
+by the provisions of a Motorola Software License Agreement.
+
+Module Name:
+
+    pxnatsup.c
+
+Abstract:
+
+    The module provides the National SuperIO (PC87311) support for Power PC.
+
+Author:
+
+    Jim Wooldridge (jimw@austin.vnet.ibm.com)
+
+
+Revision History:
+
+
+
+--*/
+
+#include "halp.h"
+#include "pxnatsup.h"
+
+
+
+BOOLEAN
+HalpInitSuperIo (
+    VOID
+    )
+
+
+{
+
+    //
+    // Initialize the National SuperIO chip
+    //
+
+    WRITE_REGISTER_UCHAR(
+             &((PNAT_SUPERIO_CONTROL)HalpIoControlBase)->SuperIoIndexRegister,
+             FER_ACCESS);
+
+    WRITE_REGISTER_UCHAR(
+              &((PNAT_SUPERIO_CONTROL)HalpIoControlBase)->SuperIoDataRegister,
+              FER_PARALLEL_PORT_ENABLE |
+              FER_UART1_ENABLE |
+              FER_UART2_ENABLE |
+              FER_FDC_ENABLE   |
+              FER_IDE);
+
+    WRITE_REGISTER_UCHAR(
+              &((PNAT_SUPERIO_CONTROL)HalpIoControlBase)->SuperIoIndexRegister,
+              FAR_ACCESS);
+
+    //
+    // LPT2 - irq5, uart1-com1, UART2-com2,
+    //
+
+    WRITE_REGISTER_UCHAR(
+               &((PNAT_SUPERIO_CONTROL)HalpIoControlBase)->SuperIoDataRegister,
+               0x10);
+
+    WRITE_REGISTER_UCHAR(
+              &((PNAT_SUPERIO_CONTROL)HalpIoControlBase)->SuperIoIndexRegister,
+              PTR_ACCESS);
+
+    WRITE_REGISTER_UCHAR(
+               &((PNAT_SUPERIO_CONTROL)HalpIoControlBase)->SuperIoDataRegister,
+               0x04);
+
+    return TRUE;
+
+}