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author | Subv <subv2112@gmail.com> | 2017-08-19 18:30:20 +0200 |
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committer | Subv <subv2112@gmail.com> | 2017-08-21 15:34:23 +0200 |
commit | 9d0841b48b6b6f3c5a2425922617343fc2f79cdc (patch) | |
tree | 396f1f14d1af656f2863bf1b8c8020fff7821e37 | |
parent | Dyncom: Fixed a conversion warning when decoding thumb instructions. (diff) | |
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-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 6 | ||||
-rw-r--r-- | src/core/arm/skyeye_common/armstate.h | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f829b9229..3522d1e82 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -838,7 +838,7 @@ static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, cons return inst_size; } -static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) { +static int InterpreterTranslateBlock(ARMul_State* cpu, std::size_t& bb_start, u32 addr) { MICROPROFILE_SCOPE(DynCom_Decode); // Decode instruction, get index @@ -871,7 +871,7 @@ static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) return KEEP_GOING; } -static int InterpreterTranslateSingle(ARMul_State* cpu, int& bb_start, u32 addr) { +static int InterpreterTranslateSingle(ARMul_State* cpu, std::size_t& bb_start, u32 addr) { MICROPROFILE_SCOPE(DynCom_Decode); ARM_INST_PTR inst_base = nullptr; @@ -1620,7 +1620,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { unsigned int addr; unsigned int num_instrs = 0; - int ptr; + std::size_t ptr; LOAD_NZCVT; DISPATCH : { diff --git a/src/core/arm/skyeye_common/armstate.h b/src/core/arm/skyeye_common/armstate.h index 1a707ff7e..893877797 100644 --- a/src/core/arm/skyeye_common/armstate.h +++ b/src/core/arm/skyeye_common/armstate.h @@ -230,7 +230,7 @@ public: // TODO(bunnei): Move this cache to a better place - it should be per codeset (likely per // process for our purposes), not per ARMul_State (which tracks CPU core state). - std::unordered_map<u32, int> instruction_cache; + std::unordered_map<u32, std::size_t> instruction_cache; private: void ResetMPCoreCP15Registers(); |