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authorwwylele <wwylele@gmail.com>2017-07-20 22:18:07 +0200
committerwwylele <wwylele@gmail.com>2017-07-20 22:18:07 +0200
commitb5609e15781010a08afbd20778d34b1a8567995d (patch)
treea120b92d5728bc20f797ae6c17aea74cbb582218 /src/citra_qt/debugger
parentdebugger/shader: fix address register for reverted arithmetic op (diff)
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Diffstat (limited to 'src/citra_qt/debugger')
-rw-r--r--src/citra_qt/debugger/graphics/graphics_vertex_shader.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/citra_qt/debugger/graphics/graphics_vertex_shader.cpp b/src/citra_qt/debugger/graphics/graphics_vertex_shader.cpp
index f6bd6bf61..1301a3fed 100644
--- a/src/citra_qt/debugger/graphics/graphics_vertex_shader.cpp
+++ b/src/citra_qt/debugger/graphics/graphics_vertex_shader.cpp
@@ -263,6 +263,10 @@ QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) con
output << ") ";
} else if (opcode_info.subtype & OpCode::Info::HasUniformIndex) {
+ if (opcode.EffectiveOpCode() == OpCode::Id::JMPU &&
+ (instr.flow_control.num_instructions & 1) == 1) {
+ output << '!';
+ }
output << 'b' << instr.flow_control.bool_uniform_id << ' ';
}