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author | bunnei <bunneidev@gmail.com> | 2017-08-29 03:09:42 +0200 |
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committer | bunnei <bunneidev@gmail.com> | 2017-09-30 20:28:53 +0200 |
commit | 3411883fe32786c08bbdb28fd35e0b39a420be41 (patch) | |
tree | 5d041dd65fcc20f2b8226f70b718a9c72e0bae5a /src/core/arm/dynarmic/arm_dynarmic.cpp | |
parent | elf: Check if machine is ARM. (diff) | |
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Diffstat (limited to 'src/core/arm/dynarmic/arm_dynarmic.cpp')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 129 |
1 files changed, 81 insertions, 48 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 7d2790b08..3da968344 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -14,72 +14,105 @@ #include "core/hle/svc.h" #include "core/memory.h" -static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void* user_arg) { - ARMul_State* state = static_cast<ARMul_State*>(user_arg); +static void InterpreterFallback(u64 pc, Dynarmic::Jit* jit, void* user_arg) { + UNIMPLEMENTED_MSG("InterpreterFallback for ARM64 JIT does not exist!"); + //ARMul_State* state = static_cast<ARMul_State*>(user_arg); - state->Reg = jit->Regs(); - state->Cpsr = jit->Cpsr(); - state->Reg[15] = pc; - state->ExtReg = jit->ExtRegs(); - state->VFP[VFP_FPSCR] = jit->Fpscr(); - state->NumInstrsToExecute = 1; + //state->Reg = jit->Regs(); + //state->Cpsr = jit->Cpsr(); + //state->Reg[15] = static_cast<u32>(pc); + //state->ExtReg = jit->ExtRegs(); + //state->VFP[VFP_FPSCR] = jit->Fpscr(); + //state->NumInstrsToExecute = 1; - InterpreterMainLoop(state); + //InterpreterMainLoop(state); - bool is_thumb = (state->Cpsr & (1 << 5)) != 0; - state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC); + //bool is_thumb = (state->Cpsr & (1 << 5)) != 0; + //state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC); - jit->Regs() = state->Reg; - jit->Cpsr() = state->Cpsr; - jit->ExtRegs() = state->ExtReg; - jit->SetFpscr(state->VFP[VFP_FPSCR]); + //jit->Regs() = state->Reg; + //jit->Cpsr() = state->Cpsr; + //jit->ExtRegs() = state->ExtReg; + //jit->SetFpscr(state->VFP[VFP_FPSCR]); } -static bool IsReadOnlyMemory(u32 vaddr) { +static bool IsReadOnlyMemory(u64 vaddr) { // TODO(bunnei): ImplementMe return false; } +u8 MemoryRead8(const u64 addr) { + return Memory::Read8(static_cast<VAddr>(addr)); +} + +u16 MemoryRead16(const u64 addr) { + return Memory::Read16(static_cast<VAddr>(addr)); +} + +u32 MemoryRead32(const u64 addr) { + return Memory::Read32(static_cast<VAddr>(addr)); +} + +u64 MemoryRead64(const u64 addr) { + return Memory::Read64(static_cast<VAddr>(addr)); +} + +void MemoryWrite8(const u64 addr, const u8 data) { + Memory::Write8(static_cast<VAddr>(addr), data); +} + +void MemoryWrite16(const u64 addr, const u16 data) { + Memory::Write16(static_cast<VAddr>(addr), data); +} + +void MemoryWrite32(const u64 addr, const u32 data) { + Memory::Write32(static_cast<VAddr>(addr), data); +} + +void MemoryWrite64(const u64 addr, const u64 data) { + Memory::Write64(static_cast<VAddr>(addr), data); +} + static Dynarmic::UserCallbacks GetUserCallbacks( const std::shared_ptr<ARMul_State>& interpeter_state) { Dynarmic::UserCallbacks user_callbacks{}; - user_callbacks.InterpreterFallback = &InterpreterFallback; - user_callbacks.user_arg = static_cast<void*>(interpeter_state.get()); + //user_callbacks.InterpreterFallback = &InterpreterFallback; + //user_callbacks.user_arg = static_cast<void*>(interpeter_state.get()); user_callbacks.CallSVC = &SVC::CallSVC; user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory; - user_callbacks.memory.ReadCode = &Memory::Read32; - user_callbacks.memory.Read8 = &Memory::Read8; - user_callbacks.memory.Read16 = &Memory::Read16; - user_callbacks.memory.Read32 = &Memory::Read32; - user_callbacks.memory.Read64 = &Memory::Read64; - user_callbacks.memory.Write8 = &Memory::Write8; - user_callbacks.memory.Write16 = &Memory::Write16; - user_callbacks.memory.Write32 = &Memory::Write32; - user_callbacks.memory.Write64 = &Memory::Write64; - user_callbacks.page_table = Memory::GetCurrentPageTablePointers(); + user_callbacks.memory.ReadCode = &MemoryRead32; + user_callbacks.memory.Read8 = &MemoryRead8; + user_callbacks.memory.Read16 = &MemoryRead16; + user_callbacks.memory.Read32 = &MemoryRead32; + user_callbacks.memory.Read64 = &MemoryRead64; + user_callbacks.memory.Write8 = &MemoryWrite8; + user_callbacks.memory.Write16 = &MemoryWrite16; + user_callbacks.memory.Write32 = &MemoryWrite32; + user_callbacks.memory.Write64 = &MemoryWrite64; + //user_callbacks.page_table = Memory::GetCurrentPageTablePointers(); user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state); return user_callbacks; } ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) { interpreter_state = std::make_shared<ARMul_State>(initial_mode); - jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state)); + jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state), Dynarmic::Arch::ARM64); } -void ARM_Dynarmic::SetPC(u32 pc) { - jit->Regs()[15] = pc; +void ARM_Dynarmic::SetPC(u64 pc) { + jit->Regs64()[32] = pc; } -u32 ARM_Dynarmic::GetPC() const { - return jit->Regs()[15]; +u64 ARM_Dynarmic::GetPC() const { + return jit->Regs64()[32]; } -u32 ARM_Dynarmic::GetReg(int index) const { - return jit->Regs()[index]; +u64 ARM_Dynarmic::GetReg(int index) const { + return jit->Regs64()[index]; } -void ARM_Dynarmic::SetReg(int index, u32 value) { - jit->Regs()[index] = value; +void ARM_Dynarmic::SetReg(int index, u64 value) { + jit->Regs64()[index] = value; } u32 ARM_Dynarmic::GetVFPReg(int index) const { @@ -136,18 +169,18 @@ MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64)); void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { MICROPROFILE_SCOPE(ARM_Jit); - unsigned ticks_executed = jit->Run(static_cast<unsigned>(num_instructions)); + unsigned ticks_executed = jit->Run(1 /*static_cast<unsigned>(num_instructions)*/); AddTicks(ticks_executed); } void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { - memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers)); - memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers)); + memcpy(ctx.cpu_registers, jit->Regs64().data(), sizeof(ctx.cpu_registers)); + //memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers)); - ctx.sp = jit->Regs()[13]; - ctx.lr = jit->Regs()[14]; - ctx.pc = jit->Regs()[15]; + ctx.lr = jit->Regs64()[30]; + ctx.sp = jit->Regs64()[31]; + ctx.pc = jit->Regs64()[32]; ctx.cpsr = jit->Cpsr(); ctx.fpscr = jit->Fpscr(); @@ -155,12 +188,12 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { } void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { - memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); - memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); + memcpy(jit->Regs64().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); + //memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); - jit->Regs()[13] = ctx.sp; - jit->Regs()[14] = ctx.lr; - jit->Regs()[15] = ctx.pc; + jit->Regs64()[30] = ctx.lr; + jit->Regs64()[31] = ctx.sp; + jit->Regs64()[32] = ctx.pc; jit->Cpsr() = ctx.cpsr; jit->SetFpscr(ctx.fpscr); |