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author | bunnei <bunneidev@gmail.com> | 2020-10-21 04:07:39 +0200 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-10-21 04:07:39 +0200 |
commit | 3d592972dc3fd61cc88771b889eff237e4e03e0f (patch) | |
tree | 0dbc65ac86e609ae22087c7be9d4759ac6b73004 /src/core/arm/dynarmic | |
parent | kernel: Fix build with recent compiler flag changes (diff) | |
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Diffstat (limited to 'src/core/arm/dynarmic')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 10 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.h | 8 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 10 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.h | 8 |
4 files changed, 18 insertions, 18 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index fab694fc2..b5f28a86e 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -111,7 +111,7 @@ public: } return 0U; } - return static_cast<u64>(std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0)); + return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0); } ARM_Dynarmic_32& parent; @@ -210,19 +210,19 @@ u64 ARM_Dynarmic_32::GetPC() const { return jit->Regs()[15]; } -u64 ARM_Dynarmic_32::GetReg(std::size_t index) const { +u64 ARM_Dynarmic_32::GetReg(int index) const { return jit->Regs()[index]; } -void ARM_Dynarmic_32::SetReg(std::size_t index, u64 value) { +void ARM_Dynarmic_32::SetReg(int index, u64 value) { jit->Regs()[index] = static_cast<u32>(value); } -u128 ARM_Dynarmic_32::GetVectorReg(std::size_t index) const { +u128 ARM_Dynarmic_32::GetVectorReg(int index) const { return {}; } -void ARM_Dynarmic_32::SetVectorReg(std::size_t index, u128 value) {} +void ARM_Dynarmic_32::SetVectorReg(int index, u128 value) {} u32 ARM_Dynarmic_32::GetPSTATE() const { return jit->Cpsr(); diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.h b/src/core/arm/dynarmic/arm_dynarmic_32.h index ba646c623..2bab31b92 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.h +++ b/src/core/arm/dynarmic/arm_dynarmic_32.h @@ -35,10 +35,10 @@ public: void SetPC(u64 pc) override; u64 GetPC() const override; - u64 GetReg(std::size_t index) const override; - void SetReg(std::size_t index, u64 value) override; - u128 GetVectorReg(std::size_t index) const override; - void SetVectorReg(std::size_t index, u128 value) override; + u64 GetReg(int index) const override; + void SetReg(int index, u64 value) override; + u128 GetVectorReg(int index) const override; + void SetVectorReg(int index, u128 value) override; u32 GetPSTATE() const override; void SetPSTATE(u32 pstate) override; void Run() override; diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index a2c4c2f30..ce9968724 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -148,7 +148,7 @@ public: } return 0U; } - return static_cast<u64>(std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0)); + return std::max<s64>(parent.system.CoreTiming().GetDowncount(), 0); } u64 GetCNTPCT() override { @@ -265,19 +265,19 @@ u64 ARM_Dynarmic_64::GetPC() const { return jit->GetPC(); } -u64 ARM_Dynarmic_64::GetReg(std::size_t index) const { +u64 ARM_Dynarmic_64::GetReg(int index) const { return jit->GetRegister(index); } -void ARM_Dynarmic_64::SetReg(std::size_t index, u64 value) { +void ARM_Dynarmic_64::SetReg(int index, u64 value) { jit->SetRegister(index, value); } -u128 ARM_Dynarmic_64::GetVectorReg(std::size_t index) const { +u128 ARM_Dynarmic_64::GetVectorReg(int index) const { return jit->GetVector(index); } -void ARM_Dynarmic_64::SetVectorReg(std::size_t index, u128 value) { +void ARM_Dynarmic_64::SetVectorReg(int index, u128 value) { jit->SetVector(index, value); } diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.h b/src/core/arm/dynarmic/arm_dynarmic_64.h index 2afb7e7a4..403c55961 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.h +++ b/src/core/arm/dynarmic/arm_dynarmic_64.h @@ -33,10 +33,10 @@ public: void SetPC(u64 pc) override; u64 GetPC() const override; - u64 GetReg(std::size_t index) const override; - void SetReg(std::size_t index, u64 value) override; - u128 GetVectorReg(std::size_t index) const override; - void SetVectorReg(std::size_t index, u128 value) override; + u64 GetReg(int index) const override; + void SetReg(int index, u64 value) override; + u128 GetVectorReg(int index) const override; + void SetVectorReg(int index, u128 value) override; u32 GetPSTATE() const override; void SetPSTATE(u32 pstate) override; void Run() override; |