diff options
| author | Lioncash <mathew1800@gmail.com> | 2015-01-16 15:50:53 +0100 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-01-17 03:05:27 +0100 |
| commit | 0a5d450e940c6f1dd2502de05af71633a7995276 (patch) | |
| tree | 5b909eca21c04d0ee819f686e67f3d33acf13cb3 /src/core/arm/dyncom | |
| parent | APT: Fix typo in setting return code for NotifyToWait (diff) | |
| download | yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.tar yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.tar.gz yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.tar.bz2 yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.tar.lz yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.tar.xz yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.tar.zst yuzu-0a5d450e940c6f1dd2502de05af71633a7995276.zip | |
Diffstat (limited to 'src/core/arm/dyncom')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 32 |
1 files changed, 15 insertions, 17 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index b5e0993ed..6052e4f58 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -1726,25 +1726,21 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index) } ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index) { - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); - ldst_inst *inst_cream = (ldst_inst *)inst_base->component; + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); + ldst_inst* inst_cream = (ldst_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = NON_BRANCH; + inst_base->idx = index; + inst_base->br = NON_BRANCH; inst_cream->inst = inst; - if (I_BIT == 0) { + if (BITS(inst, 25, 27) == 2) { inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); + } else if (BITS(inst, 25, 27) == 3) { + inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); } else { DEBUG_MSG; } - #if 0 - inst_cream->get_addr = get_calc_addr_op(inst); - if(inst == 0x54f13001) { - DEBUG_LOG(ARM11, "get_calc_addr_op:%llx\n", inst_cream->get_addr); - } - #endif if (BITS(inst, 12, 15) == 15) { inst_base->br = INDIRECT_BRANCH; @@ -2712,17 +2708,19 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index) } ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index) { - arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); - ldst_inst *inst_cream = (ldst_inst *)inst_base->component; + arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); + ldst_inst* inst_cream = (ldst_inst*)inst_base->component; inst_base->cond = BITS(inst, 28, 31); - inst_base->idx = index; - inst_base->br = NON_BRANCH; + inst_base->idx = index; + inst_base->br = NON_BRANCH; inst_cream->inst = inst; -// inst_cream->get_addr = get_calc_addr_op(inst); - if (I_BIT == 0) { + + if (BITS(inst, 25, 27) == 2) { inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); + } else if (BITS(inst, 25, 27) == 3) { + inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); } else { DEBUG_MSG; } |