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authorLioncash <mathew1800@gmail.com>2015-04-20 22:15:33 +0200
committerLioncash <mathew1800@gmail.com>2015-04-20 22:30:34 +0200
commit8b2b620a5e70a47a5ff8b3b90c5159a03ead2745 (patch)
treefded294e2ca1076f9bdb52d6085b1fc620e17840 /src/core/arm/dyncom
parentMerge pull request #704 from citra-emu/archshift-patch-1 (diff)
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Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 1b1d01420..bc1e969e4 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -31,7 +31,6 @@ ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
// Reset the core to initial state
ARMul_Reset(state.get());
- state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext
state->Emulate = RUN;
// Switch to the desired privilege mode.
@@ -99,7 +98,6 @@ void ARM_DynCom::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 e
context.pc = entry_point;
context.sp = stack_top;
context.cpsr = 0x1F; // Usermode
- context.mode = 8; // Instructs dyncom CPU core to start execution as if it's "resuming" a thread.
}
void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
@@ -113,8 +111,6 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
ctx.fpscr = state->VFP[1];
ctx.fpexc = state->VFP[2];
-
- ctx.mode = state->NextInstr;
}
void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
@@ -128,8 +124,6 @@ void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
state->VFP[1] = ctx.fpscr;
state->VFP[2] = ctx.fpexc;
-
- state->NextInstr = ctx.mode;
}
void ARM_DynCom::PrepareReschedule() {