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author | Lioncash <mathew1800@gmail.com> | 2015-04-20 22:15:33 +0200 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-04-20 22:30:34 +0200 |
commit | 8b2b620a5e70a47a5ff8b3b90c5159a03ead2745 (patch) | |
tree | fded294e2ca1076f9bdb52d6085b1fc620e17840 /src/core/arm/interpreter | |
parent | Merge pull request #704 from citra-emu/archshift-patch-1 (diff) | |
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Diffstat (limited to 'src/core/arm/interpreter')
-rw-r--r-- | src/core/arm/interpreter/arminit.cpp | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp index 6fa028f49..6ac45c396 100644 --- a/src/core/arm/interpreter/arminit.cpp +++ b/src/core/arm/interpreter/arminit.cpp @@ -29,22 +29,8 @@ ARMul_State* ARMul_NewState(ARMul_State* state) memset(state, 0, sizeof(ARMul_State)); state->Emulate = RUN; - for (unsigned int i = 0; i < 16; i++) { - state->Reg[i] = 0; - for (unsigned int j = 0; j < 7; j++) - state->RegBank[j][i] = 0; - } - for (unsigned int i = 0; i < 7; i++) - state->Spsr[i] = 0; - state->Mode = USER32MODE; - state->VectorCatch = 0; - state->Aborted = false; - state->Reseted = false; - state->Inted = 3; - state->LastInted = 3; - state->lateabtSig = HIGH; state->bigendSig = LOW; @@ -129,26 +115,18 @@ void ARMul_Reset(ARMul_State* state) { VFPInit(state); - state->NextInstr = 0; - state->Reg[15] = 0; state->Cpsr = INTBITS | SVC32MODE; state->Mode = SVC32MODE; - state->Bank = SVCBANK; - FLUSHPIPE; ResetMPCoreCP15Registers(state); - state->EndCondition = 0; - state->ErrorCode = 0; - state->NresetSig = HIGH; state->NfiqSig = HIGH; state->NirqSig = HIGH; state->NtransSig = (state->Mode & 3) ? HIGH : LOW; state->abortSig = LOW; - state->AbortAddr = 1; state->NumInstrs = 0; } |