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authorLioncash <mathew1800@gmail.com>2015-03-09 02:53:03 +0100
committerLioncash <mathew1800@gmail.com>2015-03-09 03:03:11 +0100
commit386dbab5ea5bd8503471dc010346a9c1b715df23 (patch)
treea97be6f0cdc394f9ee00b7d002d1472d8847f22b /src/core
parentdyncom: General cleanup of STM (diff)
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Diffstat (limited to 'src/core')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp9
1 files changed, 4 insertions, 5 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index ba09c58b7..2f72f5077 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -5976,13 +5976,12 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
unsigned int inst = inst_cream->inst;
- int i;
unsigned int Rn = BITS(inst, 16, 19);
unsigned int old_RN = cpu->Reg[Rn];
inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
if (BIT(inst_cream->inst, 22) == 1) {
- for (i = 0; i < 13; i++) {
+ for (int i = 0; i < 13; i++) {
if (BIT(inst_cream->inst, i)) {
Memory::Write32(addr, cpu->Reg[i]);
addr += 4;
@@ -5990,7 +5989,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
}
if (BIT(inst_cream->inst, 13)) {
if (cpu->Mode == USER32MODE)
- Memory::Write32(addr, cpu->Reg[i]);
+ Memory::Write32(addr, cpu->Reg[13]);
else
Memory::Write32(addr, cpu->Reg_usr[0]);
@@ -5998,7 +5997,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
}
if (BIT(inst_cream->inst, 14)) {
if (cpu->Mode == USER32MODE)
- Memory::Write32(addr, cpu->Reg[i]);
+ Memory::Write32(addr, cpu->Reg[14]);
else
Memory::Write32(addr, cpu->Reg_usr[1]);
@@ -6008,7 +6007,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
Memory::Write32(addr, cpu->Reg_usr[1] + 8);
}
} else {
- for (i = 0; i < 15; i++) {
+ for (int i = 0; i < 15; i++) {
if (BIT(inst_cream->inst, i)) {
if (i == Rn)
Memory::Write32(addr, old_RN);