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authorLioncash <mathew1800@gmail.com>2015-08-07 13:29:27 +0200
committerLioncash <mathew1800@gmail.com>2015-08-07 13:29:27 +0200
commitf48a89af8bc76a81a1c3fc3d4c2f52a8dc3b323b (patch)
tree08abe301a6faf1643a5cac630cba05a522a574d9 /src/core
parentMerge pull request #1022 from aroulin/disas-missing-v6k-instructions (diff)
parentarm_disasm: Remove unnecessary code (diff)
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Diffstat (limited to 'src/core')
-rw-r--r--src/core/arm/disassembler/arm_disasm.cpp16
1 files changed, 4 insertions, 12 deletions
diff --git a/src/core/arm/disassembler/arm_disasm.cpp b/src/core/arm/disassembler/arm_disasm.cpp
index 8eec64d48..964e30112 100644
--- a/src/core/arm/disassembler/arm_disasm.cpp
+++ b/src/core/arm/disassembler/arm_disasm.cpp
@@ -854,20 +854,12 @@ Opcode ARM_Disasm::Decode10(uint32_t insn) {
return OP_LDM;
return OP_STM;
}
- // Branch or Branch with link
- uint8_t is_link = (insn >> 24) & 1;
- uint32_t offset = insn & 0xffffff;
- // Sign-extend the 24-bit offset
- if ((offset >> 23) & 1)
- offset |= 0xff000000;
+ // Branch with link
+ if ((insn >> 24) & 1)
+ return OP_BL;
- // Pre-compute the left-shift and the prefetch offset
- offset <<= 2;
- offset += 8;
- if (is_link == 0)
- return OP_B;
- return OP_BL;
+ return OP_B;
}
Opcode ARM_Disasm::Decode11(uint32_t insn) {