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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-05-09 08:11:34 +0200 |
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committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:30 +0200 |
commit | 1c9307969c4e3f6206947f1360acae33f95a4a86 (patch) | |
tree | 86ccd9c88333327d7659a396f66301955a088f45 /src/shader_recompiler/backend/glasm/reg_alloc.cpp | |
parent | glasm: Use CMP.S for Select32 (diff) | |
download | yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.tar yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.tar.gz yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.tar.bz2 yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.tar.lz yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.tar.xz yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.tar.zst yuzu-1c9307969c4e3f6206947f1360acae33f95a4a86.zip |
Diffstat (limited to 'src/shader_recompiler/backend/glasm/reg_alloc.cpp')
-rw-r--r-- | src/shader_recompiler/backend/glasm/reg_alloc.cpp | 62 |
1 files changed, 35 insertions, 27 deletions
diff --git a/src/shader_recompiler/backend/glasm/reg_alloc.cpp b/src/shader_recompiler/backend/glasm/reg_alloc.cpp index e198dd522..030b48d83 100644 --- a/src/shader_recompiler/backend/glasm/reg_alloc.cpp +++ b/src/shader_recompiler/backend/glasm/reg_alloc.cpp @@ -12,53 +12,61 @@ #include "shader_recompiler/frontend/ir/value.h" namespace Shader::Backend::GLASM { -namespace { -std::string Representation(Id id) { - if (id.is_condition_code != 0) { - throw NotImplementedException("Condition code"); - } - if (id.is_spill != 0) { - throw NotImplementedException("Spilling"); - } - const u32 index{static_cast<u32>(id.index)}; - return fmt::format("R{}.x", index); + +Register RegAlloc::Define(IR::Inst& inst) { + const Id id{Alloc()}; + inst.SetDefinition<Id>(id); + Register ret; + ret.type = Type::Register; + ret.id = id; + return ret; } -std::string ImmValue(const IR::Value& value) { +Value RegAlloc::Consume(const IR::Value& value) { + if (!value.IsImmediate()) { + return Consume(*value.InstRecursive()); + } + Value ret; switch (value.Type()) { case IR::Type::U1: - return value.U1() ? "-1" : "0"; + ret.type = Type::U32; + ret.imm_u32 = value.U1() ? 0xffffffff : 0; + break; case IR::Type::U32: - return fmt::format("{}", value.U32()); + ret.type = Type::U32; + ret.imm_u32 = value.U32(); + break; case IR::Type::F32: - return fmt::format("{}", value.F32()); + ret.type = Type::F32; + ret.imm_f32 = value.F32(); + break; default: throw NotImplementedException("Immediate type {}", value.Type()); } + return ret; } -} // Anonymous namespace -std::string RegAlloc::Define(IR::Inst& inst) { - const Id id{Alloc()}; - inst.SetDefinition<Id>(id); - return Representation(id); +Register RegAlloc::AllocReg() { + Register ret; + ret.type = Type::Register; + ret.id = Alloc(); + return ret; } -std::string RegAlloc::Consume(const IR::Value& value) { - if (value.IsImmediate()) { - return ImmValue(value); - } else { - return Consume(*value.InstRecursive()); - } +void RegAlloc::FreeReg(Register reg) { + Free(reg.id); } -std::string RegAlloc::Consume(IR::Inst& inst) { +Value RegAlloc::Consume(IR::Inst& inst) { const Id id{inst.Definition<Id>()}; inst.DestructiveRemoveUsage(); if (!inst.HasUses()) { Free(id); } - return Representation(inst.Definition<Id>()); + Value ret; + ret.type = Type::Register; + ret.id = id; + return ret; } Id RegAlloc::Alloc() { |