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authorlat9nq <22451773+lat9nq@users.noreply.github.com>2021-07-08 23:22:31 +0200
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-23 03:51:35 +0200
commit373f75d944473731408d7a72c967d5c4b37af5bb (patch)
treea6af34845e9cae1429bbd004a36b324bb02f9932 /src/shader_recompiler/backend/spirv
parentshader: Comment why the array component is not read in TMML (diff)
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Diffstat (limited to 'src/shader_recompiler/backend/spirv')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp24
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_instructions.h2
2 files changed, 18 insertions, 8 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 442a958a5..42fff74e3 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -163,35 +163,43 @@ Id GetCbufElement(EmitContext& ctx, Id vector, const IR::Value& offset, u32 inde
} // Anonymous namespace
void EmitGetRegister(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitSetRegister(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitGetPred(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitSetPred(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitSetGotoVariable(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitGetGotoVariable(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitSetIndirectBranchVariable(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
}
void EmitGetIndirectBranchVariable(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+ throw LogicError("Unreachable instruction");
+}
+
+void EmitSetLoopSafetyVariable(EmitContext&) {
+ throw LogicError("Unreachable instruction");
+}
+
+void EmitGetLoopSafetyVariable(EmitContext&) {
+ throw LogicError("Unreachable instruction");
}
Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
index 1181e7b4f..e3e5b03fe 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
@@ -43,6 +43,8 @@ void EmitSetGotoVariable(EmitContext& ctx);
void EmitGetGotoVariable(EmitContext& ctx);
void EmitSetIndirectBranchVariable(EmitContext& ctx);
void EmitGetIndirectBranchVariable(EmitContext& ctx);
+void EmitSetLoopSafetyVariable(EmitContext& ctx);
+void EmitGetLoopSafetyVariable(EmitContext& ctx);
Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);