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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-04-04 10:17:17 +0200 |
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committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:26 +0200 |
commit | da6cf2632cd4dc0d2b0278353fcaee0789b418c0 (patch) | |
tree | 90c2d6f6fa724365a4a23c888389e525e316a4fd /src/shader_recompiler/frontend/ir/ir_emitter.cpp | |
parent | shader: Implement BAR and fix memory barriers (diff) | |
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Diffstat (limited to 'src/shader_recompiler/frontend/ir/ir_emitter.cpp')
-rw-r--r-- | src/shader_recompiler/frontend/ir/ir_emitter.cpp | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index 246c3b9ef..ed1e0dd3b 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp @@ -1628,6 +1628,26 @@ U32 IREmitter::SubgroupBallot(const U1& value) { return Inst<U32>(Opcode::SubgroupBallot, value); } +U32 IREmitter::SubgroupEqMask() { + return Inst<U32>(Opcode::SubgroupEqMask); +} + +U32 IREmitter::SubgroupLtMask() { + return Inst<U32>(Opcode::SubgroupLtMask); +} + +U32 IREmitter::SubgroupLeMask() { + return Inst<U32>(Opcode::SubgroupLeMask); +} + +U32 IREmitter::SubgroupGtMask() { + return Inst<U32>(Opcode::SubgroupGtMask); +} + +U32 IREmitter::SubgroupGeMask() { + return Inst<U32>(Opcode::SubgroupGeMask); +} + U32 IREmitter::ShuffleIndex(const IR::U32& value, const IR::U32& index, const IR::U32& clamp, const IR::U32& seg_mask) { return Inst<U32>(Opcode::ShuffleIndex, value, index, clamp, seg_mask); |