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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-05-10 02:15:07 +0200 |
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committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:30 +0200 |
commit | 45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2 (patch) | |
tree | 0258a4336469248c1dbcd12766dd265c9f56a79e /src/shader_recompiler | |
parent | glasm: Add floating-point comparisons on GLASM (diff) | |
download | yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.tar yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.tar.gz yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.tar.bz2 yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.tar.lz yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.tar.xz yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.tar.zst yuzu-45ef62d3ba2512be3f2d445c88b85ca6c18a6fe2.zip |
Diffstat (limited to 'src/shader_recompiler')
-rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp index 9d72af942..c9386805a 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp @@ -141,14 +141,14 @@ void EmitUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) { void EmitSClamp32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value, ScalarS32 min, ScalarS32 max) { const Register ret{ctx.reg_alloc.Define(inst)}; - ctx.Add("MIN.S {}.x,{},{};", ret, max, value); - ctx.Add("MAX.S {}.x,{},{};", ret, ret, min); + ctx.Add("MIN.S {}.x,{},{};", ret, max, value); + ctx.Add("MAX.S {}.x,{},{};", ret, ret, min); } void EmitUClamp32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 min, ScalarU32 max) { const Register ret{ctx.reg_alloc.Define(inst)}; - ctx.Add("MIN.U {}.x,{},{};", ret, max, value); - ctx.Add("MAX.U {}.x,{},{};", ret, ret, min); + ctx.Add("MIN.U {}.x,{},{};", ret, max, value); + ctx.Add("MAX.U {}.x,{},{};", ret, ret, min); } void EmitSLessThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) { |