diff options
author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-05-28 00:59:22 +0200 |
---|---|---|
committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:34 +0200 |
commit | b659212dbdcac6e4f54a4306fd716b7fb74505ad (patch) | |
tree | feed1286637d6c1cd4cbeec61e8c17191d6532e6 /src/shader_recompiler | |
parent | shader: Fix FSwizzleAdd folding when going through phi nodes (diff) | |
download | yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.tar yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.tar.gz yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.tar.bz2 yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.tar.lz yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.tar.xz yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.tar.zst yuzu-b659212dbdcac6e4f54a4306fd716b7fb74505ad.zip |
Diffstat (limited to 'src/shader_recompiler')
-rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp index 2277d24ff..abf87a0df 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp @@ -84,9 +84,6 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) { if ((tmml.mask & 0b1100) != 0) { throw NotImplementedException("TMML BA results are not implmented"); } - - IR::F32 transform_constant{v.ir.Imm32(256.0f)}; - const IR::Value coords{MakeCoords(v, tmml.coord_reg, tmml.type)}; IR::U32 handle; @@ -107,9 +104,16 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) { } IR::F32 value{v.ir.CompositeExtract(sample, element)}; if (element < 2) { - value = v.ir.FPMul(value, transform_constant); + IR::U32 casted_value; + if (element == 0) { + casted_value = v.ir.ConvertFToU(32, value); + } else { + casted_value = v.ir.ConvertFToS(16, value); + } + v.X(dest_reg, v.ir.ShiftLeftLogical(casted_value, v.ir.Imm32(8))); + } else { + v.F(dest_reg, value); } - v.F(dest_reg, value); ++dest_reg; } } |