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author | Sebastian Valle <subv2112@gmail.com> | 2018-07-13 00:36:51 +0200 |
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committer | GitHub <noreply@github.com> | 2018-07-13 00:36:51 +0200 |
commit | 274d1fb0fc3d9397a468f191a0c15afc9c86f94c (patch) | |
tree | 4425f3888dc42f05a8db16ce10b736a689075ae5 /src/video_core/engines | |
parent | Merge pull request #651 from Subv/ffma_decode (diff) | |
parent | GPU: Implement the FADD32I shader instruction. (diff) | |
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Diffstat (limited to 'src/video_core/engines')
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index bdf97e77f..ab978c2e2 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -298,6 +298,13 @@ union Instruction { } iadd32i; union { + BitField<53, 1, u64> negate_b; + BitField<54, 1, u64> abs_a; + BitField<56, 1, u64> negate_a; + BitField<57, 1, u64> abs_b; + } fadd32i; + + union { BitField<20, 8, u64> shift_position; BitField<28, 8, u64> shift_length; BitField<48, 1, u64> negate_b; @@ -487,6 +494,7 @@ public: FADD_C, FADD_R, FADD_IMM, + FADD32I, FMUL_C, FMUL_R, FMUL_IMM, @@ -686,6 +694,7 @@ private: INST("0100110001011---", Id::FADD_C, Type::Arithmetic, "FADD_C"), INST("0101110001011---", Id::FADD_R, Type::Arithmetic, "FADD_R"), INST("0011100-01011---", Id::FADD_IMM, Type::Arithmetic, "FADD_IMM"), + INST("000010----------", Id::FADD32I, Type::ArithmeticImmediate, "FADD32I"), INST("0100110001101---", Id::FMUL_C, Type::Arithmetic, "FMUL_C"), INST("0101110001101---", Id::FMUL_R, Type::Arithmetic, "FMUL_R"), INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"), |