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authorSubv <subv2112@gmail.com>2018-04-24 03:01:29 +0200
committerSubv <subv2112@gmail.com>2018-04-25 18:55:27 +0200
commita994446b6ec776c9383e8b13c45eeb461405adff (patch)
tree1810023a79e3f511601d60051e15df2f869c01c3 /src/video_core/gpu.h
parentGPU: Corrected the upper bound of the PFIFO method ids in the command processor. (diff)
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Diffstat (limited to 'src/video_core/gpu.h')
-rw-r--r--src/video_core/gpu.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h
index 2888daedc..7afa6aaef 100644
--- a/src/video_core/gpu.h
+++ b/src/video_core/gpu.h
@@ -86,8 +86,6 @@ public:
}
private:
- static constexpr u32 InvalidGraphMacroEntry = 0xFFFFFFFF;
-
/// Writes a single register in the engine bound to the specified subchannel
void WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params);
@@ -100,11 +98,6 @@ private:
std::unique_ptr<Engines::Fermi2D> fermi_2d;
/// Compute engine
std::unique_ptr<Engines::MaxwellCompute> maxwell_compute;
-
- /// Entry of the macro that is currently being uploaded
- u32 current_macro_entry = InvalidGraphMacroEntry;
- /// Code being uploaded for the current macro
- std::vector<u32> current_macro_code;
};
} // namespace Tegra