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authorReinUsesLisp <reinuseslisp@airmail.cc>2019-11-08 21:08:07 +0100
committerReinUsesLisp <reinuseslisp@airmail.cc>2019-11-08 23:48:50 +0100
commit096f339a2a817054c9e2dfef188a5e2470126236 (patch)
tree83b293c8ca82a1b6052c6d20063550fd92f10c61 /src/video_core/shader
parentmicroprofile: Silence conversion warnings (diff)
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Diffstat (limited to 'src/video_core/shader')
-rw-r--r--src/video_core/shader/decode.cpp4
-rw-r--r--src/video_core/shader/shader_ir.h6
2 files changed, 5 insertions, 5 deletions
diff --git a/src/video_core/shader/decode.cpp b/src/video_core/shader/decode.cpp
index 21fb9cb83..22c3e5120 100644
--- a/src/video_core/shader/decode.cpp
+++ b/src/video_core/shader/decode.cpp
@@ -154,10 +154,10 @@ void ShaderIR::Decode() {
LOG_CRITICAL(HW_GPU, "Unknown decompilation mode!");
[[fallthrough]];
case CompileDepth::BruteForce: {
+ const auto shader_end = static_cast<u32>(program_code.size());
coverage_begin = main_offset;
- const std::size_t shader_end = program_code.size();
coverage_end = shader_end;
- for (u32 label = main_offset; label < shader_end; label++) {
+ for (u32 label = main_offset; label < shader_end; ++label) {
basic_blocks.insert({label, DecodeRange(label, label + 1)});
}
break;
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h
index 26c8fde22..76a849818 100644
--- a/src/video_core/shader/shader_ir.h
+++ b/src/video_core/shader/shader_ir.h
@@ -49,7 +49,7 @@ public:
}
u32 GetSize() const {
- return max_offset + sizeof(float);
+ return max_offset + static_cast<u32>(sizeof(float));
}
u32 GetMaxOffset() const {
@@ -165,8 +165,8 @@ public:
return program_manager.GetVariables();
}
- u32 ConvertAddressToNvidiaSpace(const u32 address) const {
- return (address - main_offset) * sizeof(Tegra::Shader::Instruction);
+ u32 ConvertAddressToNvidiaSpace(u32 address) const {
+ return (address - main_offset) * static_cast<u32>(sizeof(Tegra::Shader::Instruction));
}
/// Returns a condition code evaluated from internal flags