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authorLiam <byteslice@airmail.cc>2024-02-24 04:38:21 +0100
committerLiam <byteslice@airmail.cc>2024-02-26 17:16:14 +0100
commitd66ca8b73145c9e891415f11ce68125ff2b99b9b (patch)
tree70c4d8b3e8aa80222940fe6e490d62bf42bc0443 /src/video_core
parentMerge pull request #13164 from merryhime/reset-submodules (diff)
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Diffstat (limited to 'src/video_core')
-rw-r--r--src/video_core/control/channel_state.cpp3
-rw-r--r--src/video_core/control/channel_state.h3
-rw-r--r--src/video_core/control/channel_state_cache.cpp2
-rw-r--r--src/video_core/control/channel_state_cache.h8
-rw-r--r--src/video_core/control/channel_state_cache.inc2
-rw-r--r--src/video_core/gpu.cpp8
-rw-r--r--src/video_core/gpu.h2
-rw-r--r--src/video_core/renderer_vulkan/vk_rasterizer.cpp4
8 files changed, 20 insertions, 12 deletions
diff --git a/src/video_core/control/channel_state.cpp b/src/video_core/control/channel_state.cpp
index 832025d75..2539997d5 100644
--- a/src/video_core/control/channel_state.cpp
+++ b/src/video_core/control/channel_state.cpp
@@ -16,8 +16,9 @@ namespace Tegra::Control {
ChannelState::ChannelState(s32 bind_id_) : bind_id{bind_id_}, initialized{} {}
-void ChannelState::Init(Core::System& system, GPU& gpu) {
+void ChannelState::Init(Core::System& system, GPU& gpu, u64 program_id_) {
ASSERT(memory_manager);
+ program_id = program_id_;
dma_pusher = std::make_unique<Tegra::DmaPusher>(system, gpu, *memory_manager, *this);
maxwell_3d = std::make_unique<Engines::Maxwell3D>(system, *memory_manager);
fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
diff --git a/src/video_core/control/channel_state.h b/src/video_core/control/channel_state.h
index 3a7b9872c..b385f4939 100644
--- a/src/video_core/control/channel_state.h
+++ b/src/video_core/control/channel_state.h
@@ -40,11 +40,12 @@ struct ChannelState {
ChannelState(ChannelState&& other) noexcept = default;
ChannelState& operator=(ChannelState&& other) noexcept = default;
- void Init(Core::System& system, GPU& gpu);
+ void Init(Core::System& system, GPU& gpu, u64 program_id);
void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
s32 bind_id = -1;
+ u64 program_id = 0;
/// 3D engine
std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
/// 2D engine
diff --git a/src/video_core/control/channel_state_cache.cpp b/src/video_core/control/channel_state_cache.cpp
index 4ebeb6356..f8c6a762d 100644
--- a/src/video_core/control/channel_state_cache.cpp
+++ b/src/video_core/control/channel_state_cache.cpp
@@ -7,7 +7,7 @@ namespace VideoCommon {
ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
: maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
- gpu_memory{*channel_state.memory_manager} {}
+ gpu_memory{*channel_state.memory_manager}, program_id{channel_state.program_id} {}
template class VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo>;
diff --git a/src/video_core/control/channel_state_cache.h b/src/video_core/control/channel_state_cache.h
index 1dbfda299..7480d60d1 100644
--- a/src/video_core/control/channel_state_cache.h
+++ b/src/video_core/control/channel_state_cache.h
@@ -39,6 +39,7 @@ public:
Tegra::Engines::Maxwell3D& maxwell3d;
Tegra::Engines::KeplerCompute& kepler_compute;
Tegra::MemoryManager& gpu_memory;
+ u64 program_id;
};
template <class P>
@@ -77,9 +78,10 @@ protected:
P* channel_state;
size_t current_channel_id{UNSET_CHANNEL};
size_t current_address_space{};
- Tegra::Engines::Maxwell3D* maxwell3d;
- Tegra::Engines::KeplerCompute* kepler_compute;
- Tegra::MemoryManager* gpu_memory;
+ Tegra::Engines::Maxwell3D* maxwell3d{};
+ Tegra::Engines::KeplerCompute* kepler_compute{};
+ Tegra::MemoryManager* gpu_memory{};
+ u64 program_id{};
std::deque<P> channel_storage;
std::deque<size_t> free_channel_ids;
diff --git a/src/video_core/control/channel_state_cache.inc b/src/video_core/control/channel_state_cache.inc
index 31f792ddd..d882d8222 100644
--- a/src/video_core/control/channel_state_cache.inc
+++ b/src/video_core/control/channel_state_cache.inc
@@ -58,6 +58,7 @@ void ChannelSetupCaches<P>::BindToChannel(s32 id) {
maxwell3d = &channel_state->maxwell3d;
kepler_compute = &channel_state->kepler_compute;
gpu_memory = &channel_state->gpu_memory;
+ program_id = channel_state->program_id;
current_address_space = gpu_memory->GetID();
}
@@ -76,6 +77,7 @@ void ChannelSetupCaches<P>::EraseChannel(s32 id) {
maxwell3d = nullptr;
kepler_compute = nullptr;
gpu_memory = nullptr;
+ program_id = 0;
} else if (current_channel_id != UNSET_CHANNEL) {
channel_state = &channel_storage[current_channel_id];
}
diff --git a/src/video_core/gpu.cpp b/src/video_core/gpu.cpp
index 8e663f2a8..6d0b32339 100644
--- a/src/video_core/gpu.cpp
+++ b/src/video_core/gpu.cpp
@@ -67,8 +67,8 @@ struct GPU::Impl {
return CreateChannel(new_channel_id++);
}
- void InitChannel(Control::ChannelState& to_init) {
- to_init.Init(system, gpu);
+ void InitChannel(Control::ChannelState& to_init, u64 program_id) {
+ to_init.Init(system, gpu, program_id);
to_init.BindRasterizer(rasterizer);
rasterizer->InitializeChannel(to_init);
}
@@ -412,8 +412,8 @@ std::shared_ptr<Control::ChannelState> GPU::AllocateChannel() {
return impl->AllocateChannel();
}
-void GPU::InitChannel(Control::ChannelState& to_init) {
- impl->InitChannel(to_init);
+void GPU::InitChannel(Control::ChannelState& to_init, u64 program_id) {
+ impl->InitChannel(to_init, program_id);
}
void GPU::BindChannel(s32 channel_id) {
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h
index ad535512c..50014e51f 100644
--- a/src/video_core/gpu.h
+++ b/src/video_core/gpu.h
@@ -149,7 +149,7 @@ public:
std::shared_ptr<Control::ChannelState> AllocateChannel();
- void InitChannel(Control::ChannelState& to_init);
+ void InitChannel(Control::ChannelState& to_init, u64 program_id);
void BindChannel(s32 channel_id);
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index 74f9f099e..6cfec2e6f 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -1061,7 +1061,9 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
if (device.IsExtDepthBiasControlSupported()) {
return true;
}
- if (!Settings::values.renderer_amdvlk_depth_bias_workaround) {
+ // Only activate this in Super Smash Brothers Ultimate
+ // Affects AMD cards using AMDVLK
+ if (program_id != 0x1006A800016E000ULL) {
return false;
}
// the base formulas can be obtained from here: