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| author | FernandoS27 <fsahmkow27@gmail.com> | 2021-05-01 17:16:54 +0200 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:30 +0200 |
| commit | 153a77efee629ccdc342e3f3f2fd49488e884233 (patch) | |
| tree | 2d16b68c77e6963067e1f314446ea45eca858195 /src | |
| parent | shader: Implement Int32 SUATOM/SURED (diff) | |
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Diffstat (limited to 'src')
| -rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp index 01fb6f5e5..fe3cdfa96 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp @@ -159,6 +159,9 @@ enum class SpecialRegister : u64 { return ir.SubgroupGeMask(); case SpecialRegister::SR_Y_DIRECTION: return ir.BitCast<IR::U32>(ir.YDirection()); + case SpecialRegister::SR_AFFINITY: + // LOG_WARNING(..., "SR_AFFINITY is stubbed"); + return ir.Imm32(0); // This is the default value hardware returns. default: throw NotImplementedException("S2R special register {}", special_register); } |