8 files changed, 56 insertions, 62 deletions

diff --git a/src/citra_qt/debugger/disassembler.cpp b/src/citra_qt/debugger/disassembler.cpp
index b41c40a0e..60c18c429 100644
--- a/src/citra_qt/debugger/disassembler.cpp
+++ b/src/citra_qt/debugger/disassembler.cpp
@@ -219,7 +219,7 @@ void DisassemblerWidget::OnToggleStartStop() {
 }
 
 void DisassemblerWidget::OnDebugModeEntered() {
-    ARMword next_instr = Core::g_app_core->GetPC();
+    u32 next_instr = Core::g_app_core->GetPC();
 
     if (model->GetBreakPoints().IsAddressBreakPoint(next_instr))
         emu_thread->SetRunning(false);
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index d9db0daa0..a81bb8e91 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -51,22 +51,21 @@ typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper);
 // Defines a reservation granule of 2 words, which protects the first 2 words starting at the tag.
 // This is the smallest granule allowed by the v7 spec, and is coincidentally just large enough to
 // support LDR/STREXD.
-static const ARMword RESERVATION_GRANULE_MASK = 0xFFFFFFF8;
+static const u32 RESERVATION_GRANULE_MASK = 0xFFFFFFF8;
 
 // Exclusive memory access
-static int exclusive_detect(ARMul_State* state, ARMword addr) {
+static int exclusive_detect(ARMul_State* state, u32 addr) {
     if(state->exclusive_tag == (addr & RESERVATION_GRANULE_MASK))
         return 0;
     else
         return -1;
 }
 
-static void add_exclusive_addr(ARMul_State* state, ARMword addr){
+static void add_exclusive_addr(ARMul_State* state, u32 addr){
     state->exclusive_tag = addr & RESERVATION_GRANULE_MASK;
-    return;
 }
 
-static void remove_exclusive(ARMul_State* state, ARMword addr){
+static void remove_exclusive(ARMul_State* state, u32 addr){
     state->exclusive_tag = 0xFFFFFFFF;
 }
 
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp
index 13cc34be4..2860af376 100644
--- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp
@@ -14,7 +14,7 @@
 
 tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
     tdstate valid = t_uninitialized;
-    ARMword tinstr = instr;
+    u32 tinstr = instr;
 
     // The endian should be judge here
     if((addr & 0x3) != 0)
@@ -37,7 +37,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
 
     case 3: // ADD/SUB
         {
-            static const ARMword subset[4] = {
+            static const u32 subset[4] = {
                 0xE0900000,     // ADDS Rd,Rs,Rn
                 0xE0500000,     // SUBS Rd,Rs,Rn
                 0xE2900000,     // ADDS Rd,Rs,#imm3
@@ -56,7 +56,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
     case 6: // ADD
     case 7: // SUB
         {
-            static const ARMword subset[4] = {
+            static const u32 subset[4] = {
                 0xE3B00000,     // MOVS Rd,#imm8
                 0xE3500000,     // CMP  Rd,#imm8
                 0xE2900000,     // ADDS Rd,Rd,#imm8
@@ -85,7 +85,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
             };
 
             static const struct {
-                ARMword opcode;
+                u32 opcode;
                 otype type;
             } subset[16] = {
                 { 0xE0100000, t_norm },     // ANDS Rd,Rd,Rs
@@ -130,8 +130,8 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
                 break;
             }
         } else {
-            ARMword Rd = ((tinstr & 0x0007) >> 0);
-            ARMword Rs = ((tinstr & 0x0078) >> 3);
+            u32 Rd = ((tinstr & 0x0007) >> 0);
+            u32 Rs = ((tinstr & 0x0078) >> 3);
 
             if (tinstr & (1 << 7))
                 Rd += 8;
@@ -185,7 +185,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
     case 10:
     case 11:
         {
-            static const ARMword subset[8] = {
+            static const u32 subset[8] = {
                 0xE7800000, // STR   Rd,[Rb,Ro]
                 0xE18000B0, // STRH  Rd,[Rb,Ro]
                 0xE7C00000, // STRB  Rd,[Rb,Ro]
@@ -208,7 +208,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
     case 14: // STRB Rd,[Rb,#imm5]
     case 15: // LDRB Rd,[Rb,#imm5]
         {
-            static const ARMword subset[4] = {
+            static const u32 subset[4] = {
                 0xE5800000,     // STR  Rd,[Rb,#imm5]
                 0xE5900000,     // LDR  Rd,[Rb,#imm5]
                 0xE5C00000,     // STRB Rd,[Rb,#imm5]
@@ -275,7 +275,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
                 | BITS(tinstr, 0, 3)          // imm4 field;
                 | (BITS(tinstr, 4, 7) << 8);  // beginning 4 bits of imm12
         } else if ((tinstr & 0x0F00) == 0x0200) {
-            static const ARMword subset[4] = {
+            static const u32 subset[4] = {
                 0xE6BF0070, // SXTH
                 0xE6AF0070, // SXTB
                 0xE6FF0070, // UXTH
@@ -299,7 +299,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
                     | (BIT(tinstr, 4) << 18); // enable bit
             }
         } else if ((tinstr & 0x0F00) == 0x0a00) {
-            static const ARMword subset[3] = {
+            static const u32 subset[3] = {
                 0xE6BF0F30, // REV
                 0xE6BF0FB0, // REV16
                 0xE6FF0FB0, // REVSH
@@ -309,7 +309,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
                 | (BITS(tinstr, 0, 2) << 12)     // Rd
                 | BITS(tinstr, 3, 5);            // Rm
         } else {
-            static const ARMword subset[4] = {
+            static const u32 subset[4] = {
                 0xE92D0000, // STMDB sp!,{rlist}
                 0xE92D4000, // STMDB sp!,{rlist,lr}
                 0xE8BD0000, // LDMIA sp!,{rlist}
diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h
index f183b5098..d5f4f3068 100644
--- a/src/core/arm/skyeye_common/armdefs.h
+++ b/src/core/arm/skyeye_common/armdefs.h
@@ -44,50 +44,45 @@ enum {
     ABORT_BASE_UPDATED  = 2
 };
 
-typedef u64 ARMdword;  // must be 64 bits wide
-typedef u32 ARMword;   // must be 32 bits wide
-typedef u16 ARMhword;  // must be 16 bits wide
-typedef u8 ARMbyte;    // must be 8 bits wide
-
 #define VFP_REG_NUM 64
 struct ARMul_State
 {
-    ARMword Emulate;       // To start and stop emulation
+    u32 Emulate;       // To start and stop emulation
 
     // Order of the following register should not be modified
-    ARMword Reg[16];            // The current register file
-    ARMword Cpsr;               // The current PSR
-    ARMword Spsr_copy;
-    ARMword phys_pc;
-    ARMword Reg_usr[2];
-    ARMword Reg_svc[2];         // R13_SVC R14_SVC
-    ARMword Reg_abort[2];       // R13_ABORT R14_ABORT
-    ARMword Reg_undef[2];       // R13 UNDEF R14 UNDEF
-    ARMword Reg_irq[2];         // R13_IRQ R14_IRQ
-    ARMword Reg_firq[7];        // R8---R14 FIRQ
-    ARMword Spsr[7];            // The exception psr's
-    ARMword Mode;               // The current mode
-    ARMword Bank;               // The current register bank
-    ARMword exclusive_tag;      // The address for which the local monitor is in exclusive access mode
-    ARMword exclusive_state;
-    ARMword exclusive_result;
-    ARMword CP15[CP15_REGISTER_COUNT];
+    u32 Reg[16];            // The current register file
+    u32 Cpsr;               // The current PSR
+    u32 Spsr_copy;
+    u32 phys_pc;
+    u32 Reg_usr[2];
+    u32 Reg_svc[2];         // R13_SVC R14_SVC
+    u32 Reg_abort[2];       // R13_ABORT R14_ABORT
+    u32 Reg_undef[2];       // R13 UNDEF R14 UNDEF
+    u32 Reg_irq[2];         // R13_IRQ R14_IRQ
+    u32 Reg_firq[7];        // R8---R14 FIRQ
+    u32 Spsr[7];            // The exception psr's
+    u32 Mode;               // The current mode
+    u32 Bank;               // The current register bank
+    u32 exclusive_tag;      // The address for which the local monitor is in exclusive access mode
+    u32 exclusive_state;
+    u32 exclusive_result;
+    u32 CP15[CP15_REGISTER_COUNT];
 
     // FPSID, FPSCR, and FPEXC
-    ARMword VFP[VFP_SYSTEM_REGISTER_COUNT];
+    u32 VFP[VFP_SYSTEM_REGISTER_COUNT];
     // VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31).
     // VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31),
     // and only 32 singleword registers are accessible (S0-S31).
-    ARMword ExtReg[VFP_REG_NUM];
+    u32 ExtReg[VFP_REG_NUM];
     /* ---- End of the ordered registers ---- */
 
-    ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; // Dummy flags for speed
+    u32 NFlag, ZFlag, CFlag, VFlag, IFFlags; // Dummy flags for speed
     unsigned int shifter_carry_out;
 
     // Add armv6 flags dyf:2010-08-09
-    ARMword GEFlag, EFlag, AFlag, QFlag;
+    u32 GEFlag, EFlag, AFlag, QFlag;
 
-    ARMword TFlag; // Thumb state
+    u32 TFlag; // Thumb state
 
     unsigned long long NumInstrs; // The number of instructions executed
     unsigned NumInstrsToExecute;
diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp
index 1ffc1f9af..ed9ade886 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfp.cpp
@@ -43,7 +43,7 @@ void VFPInit(ARMul_State* state)
     state->VFP[VFP_MVFR1] = 0;
 }
 
-void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword* value)
+void VMOVBRS(ARMul_State* state, u32 to_arm, u32 t, u32 n, u32* value)
 {
     if (to_arm)
     {
@@ -55,7 +55,7 @@ void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword*
     }
 }
 
-void VMOVBRRD(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2)
+void VMOVBRRD(ARMul_State* state, u32 to_arm, u32 t, u32 t2, u32 n, u32* value1, u32* value2)
 {
     if (to_arm)
     {
@@ -68,7 +68,7 @@ void VMOVBRRD(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword
         state->ExtReg[n*2] = *value1;
     }
 }
-void VMOVBRRSS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2)
+void VMOVBRRSS(ARMul_State* state, u32 to_arm, u32 t, u32 t2, u32 n, u32* value1, u32* value2)
 {
     if (to_arm)
     {
@@ -82,7 +82,7 @@ void VMOVBRRSS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMwor
     }
 }
 
-void VMOVI(ARMul_State* state, ARMword single, ARMword d, ARMword imm)
+void VMOVI(ARMul_State* state, u32 single, u32 d, u32 imm)
 {
     if (single)
     {
@@ -95,7 +95,7 @@ void VMOVI(ARMul_State* state, ARMword single, ARMword d, ARMword imm)
         state->ExtReg[d*2] = 0;
     }
 }
-void VMOVR(ARMul_State* state, ARMword single, ARMword d, ARMword m)
+void VMOVR(ARMul_State* state, u32 single, u32 d, u32 m)
 {
     if (single)
     {
diff --git a/src/core/arm/skyeye_common/vfp/vfp.h b/src/core/arm/skyeye_common/vfp/vfp.h
index 80ca93ccd..88908da9f 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.h
+++ b/src/core/arm/skyeye_common/vfp/vfp.h
@@ -36,8 +36,8 @@ void vfp_raise_exceptions(ARMul_State* state, u32 exceptions, u32 inst, u32 fpsc
 u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr);
 u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr);
 
-void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword* value);
-void VMOVBRRD(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2);
-void VMOVBRRSS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2);
-void VMOVI(ARMul_State* state, ARMword single, ARMword d, ARMword imm);
-void VMOVR(ARMul_State* state, ARMword single, ARMword d, ARMword imm);
+void VMOVBRS(ARMul_State* state, u32 to_arm, u32 t, u32 n, u32* value);
+void VMOVBRRD(ARMul_State* state, u32 to_arm, u32 t, u32 t2, u32 n, u32* value1, u32* value2);
+void VMOVBRRSS(ARMul_State* state, u32 to_arm, u32 t, u32 t2, u32 n, u32* value1, u32* value2);
+void VMOVI(ARMul_State* state, u32 single, u32 d, u32 imm);
+void VMOVR(ARMul_State* state, u32 single, u32 d, u32 imm);
diff --git a/src/core/arm/skyeye_common/vfp/vfp_helper.h b/src/core/arm/skyeye_common/vfp/vfp_helper.h
index 2007d6dc4..f318e486a 100644
--- a/src/core/arm/skyeye_common/vfp/vfp_helper.h
+++ b/src/core/arm/skyeye_common/vfp/vfp_helper.h
@@ -415,7 +415,7 @@ struct op {
     u32 flags;
 };
 
-static inline u32 fls(ARMword x)
+static inline u32 fls(u32 x)
 {
     int r = 32;
 
diff --git a/src/core/arm/skyeye_common/vfp/vfpdouble.cpp b/src/core/arm/skyeye_common/vfp/vfpdouble.cpp
index f91049585..1d844a66e 100644
--- a/src/core/arm/skyeye_common/vfp/vfpdouble.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfpdouble.cpp
@@ -70,9 +70,9 @@ static void vfp_double_dump(const char *str, struct vfp_double *d)
 
 static void vfp_double_normalise_denormal(struct vfp_double *vd)
 {
-    int bits = 31 - fls((ARMword)(vd->significand >> 32));
+    int bits = 31 - fls((u32)(vd->significand >> 32));
     if (bits == 31)
-        bits = 63 - fls((ARMword)vd->significand);
+        bits = 63 - fls((u32)vd->significand);
 
     vfp_double_dump("normalise_denormal: in", vd);
 
@@ -109,9 +109,9 @@ u32 vfp_double_normaliseround(ARMul_State* state, int dd, struct vfp_double *vd,
     exponent = vd->exponent;
     significand = vd->significand;
 
-    shift = 32 - fls((ARMword)(significand >> 32));
+    shift = 32 - fls((u32)(significand >> 32));
     if (shift == 32)
-        shift = 64 - fls((ARMword)significand);
+        shift = 64 - fls((u32)significand);
     if (shift) {
         exponent -= shift;
         significand <<= shift;
@@ -566,7 +566,7 @@ static u32 vfp_double_ftoui(ARMul_State* state, int sd, int unused, int dm, u32
         /*
          * 2^0 <= m < 2^32-2^8
          */
-        d = (ARMword)((vdm.significand << 1) >> shift);
+        d = (u32)((vdm.significand << 1) >> shift);
         rem = vdm.significand << (65 - shift);
 
         if (rmode == FPSCR_ROUND_NEAREST) {
@@ -647,7 +647,7 @@ static u32 vfp_double_ftosi(ARMul_State* state, int sd, int unused, int dm, u32
         int shift = 1023 + 63 - vdm.exponent;	/* 58 */
         u64 rem, incr = 0;
 
-        d = (ARMword)((vdm.significand << 1) >> shift);
+        d = (u32)((vdm.significand << 1) >> shift);
         rem = vdm.significand << (65 - shift);
 
         if (rmode == FPSCR_ROUND_NEAREST) {