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authorLioncash <mathew1800@gmail.com>2015-07-28 09:41:25 +0200
committerLioncash <mathew1800@gmail.com>2015-07-28 09:41:25 +0200
commit9be4ef3879765943b67f623eb1aaa247cb3630b6 (patch)
tree2f6bea8214de7bddea32952d567eb28009fab776 /src
parentdyncom: Use enum class for instruction decoding results (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_dec.cpp6
-rw-r--r--src/core/arm/dyncom/arm_dyncom_dec.h6
2 files changed, 5 insertions, 7 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp
index 48fc1c683..ee4288314 100644
--- a/src/core/arm/dyncom/arm_dyncom_dec.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp
@@ -5,7 +5,7 @@
#include "core/arm/dyncom/arm_dyncom_dec.h"
#include "core/arm/skyeye_common/armsupp.h"
-const ISEITEM arm_instruction[] = {
+const InstructionSetEncodingItem arm_instruction[] = {
{ "vmla", 4, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 4, 4, 0 }},
{ "vmls", 7, ARMVFP2, { 28, 31, 0xF, 25, 27, 0x1, 23, 23, 1, 11, 11, 0, 8, 9, 0x2, 6, 6, 1, 4, 4, 0 }},
{ "vnmla", 4, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x1, 9, 11, 0x5, 4, 4, 0 }},
@@ -207,7 +207,7 @@ const ISEITEM arm_instruction[] = {
{ "bbl", 1, 0, { 25, 27, 0x00000005 }},
};
-const ISEITEM arm_exclusion_code[] = {
+const InstructionSetEncodingItem arm_exclusion_code[] = {
{ "vmla", 0, ARMVFP2, { 0 }},
{ "vmls", 0, ARMVFP2, { 0 }},
{ "vnmla", 0, ARMVFP2, { 0 }},
@@ -417,7 +417,7 @@ const ISEITEM arm_exclusion_code[] = {
ARMDecodeStatus DecodeARMInstruction(u32 instr, s32* idx) {
int n = 0;
int base = 0;
- int instr_slots = sizeof(arm_instruction) / sizeof(ISEITEM);
+ int instr_slots = sizeof(arm_instruction) / sizeof(InstructionSetEncodingItem);
ARMDecodeStatus ret = ARMDecodeStatus::FAILURE;
for (int i = 0; i < instr_slots; i++) {
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h
index 80d910218..d7170e0fc 100644
--- a/src/core/arm/dyncom/arm_dyncom_dec.h
+++ b/src/core/arm/dyncom/arm_dyncom_dec.h
@@ -13,15 +13,13 @@ enum class ARMDecodeStatus {
ARMDecodeStatus DecodeARMInstruction(u32 instr, s32* idx);
-struct instruction_set_encoding_item {
+struct InstructionSetEncodingItem {
const char *name;
int attribute_value;
int version;
u32 content[21];
};
-typedef struct instruction_set_encoding_item ISEITEM;
-
// ARM versions
enum {
INVALID = 0,
@@ -38,4 +36,4 @@ enum {
ARMV6K,
};
-extern const ISEITEM arm_instruction[];
+extern const InstructionSetEncodingItem arm_instruction[];