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authorbunnei <ericbunnie@gmail.com>2014-05-02 05:03:50 +0200
committerbunnei <ericbunnie@gmail.com>2014-05-02 05:03:50 +0200
commitf7c6302009aa2453c37a6a7a3b1af4843f620078 (patch)
tree59d429e36b9c3acd60a779ffbf063c59b2079e32 /src
parentfixed include in coprocessor.cpp (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/core/arm/interpreter/armsupp.cpp45
-rw-r--r--src/core/hle/coprocessor.cpp16
-rw-r--r--src/core/hle/coprocessor.h11
3 files changed, 43 insertions, 29 deletions
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index d913c179c..e531dceda 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -661,7 +661,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
void
ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
{
- unsigned cpab;
+ HLE::CallMCR(instr, source);
+ //unsigned cpab;
////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
@@ -671,29 +672,29 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
// return;
//}
- cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
+ //cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
- while (cpab == ARMul_BUSY) {
- ARMul_Icycles (state, 1, 0);
+ //while (cpab == ARMul_BUSY) {
+ // ARMul_Icycles (state, 1, 0);
- if (IntPending (state)) {
- cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
- instr, 0);
- return;
- }
- else
- cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
- source);
- }
+ // if (IntPending (state)) {
+ // cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
+ // instr, 0);
+ // return;
+ // }
+ // else
+ // cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
+ // source);
+ //}
- if (cpab == ARMul_CANT) {
- printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
- ARMul_Abort (state, ARMul_UndefinedInstrV);
- }
- else {
- BUSUSEDINCPCN;
- ARMul_Ccycles (state, 1, 0);
- }
+ //if (cpab == ARMul_CANT) {
+ // printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
+ // ARMul_Abort (state, ARMul_UndefinedInstrV);
+ //}
+ //else {
+ // BUSUSEDINCPCN;
+ // ARMul_Ccycles (state, 1, 0);
+ //}
}
/* This function does the Busy-Waiting for an MCRR instruction. */
@@ -739,7 +740,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
{
unsigned cpab;
- ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27));
+ ARMword result = HLE::CallMRC(instr);
////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
diff --git a/src/core/hle/coprocessor.cpp b/src/core/hle/coprocessor.cpp
index 5b412c586..df1362176 100644
--- a/src/core/hle/coprocessor.cpp
+++ b/src/core/hle/coprocessor.cpp
@@ -44,8 +44,18 @@ Addr GetThreadCommandBuffer() {
return CMD_BUFFER_ADDR;
}
-/// Call an MRC operation in HLE
-u32 CallMRC(ARM11_MRC_OPERATION operation) {
+/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
+s32 CallMCR(u32 instruction, u32 value) {
+ CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
+ ERROR_LOG(OSHLE, "unimplemented MCR instruction=0x%08X, operation=%02X, value=%08X",
+ instruction, operation, value);
+ return -1;
+}
+
+/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
+s32 CallMRC(u32 instruction) {
+ CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
+
switch (operation) {
case DATA_SYNCHRONIZATION_BARRIER:
@@ -55,7 +65,7 @@ u32 CallMRC(ARM11_MRC_OPERATION operation) {
return GetThreadCommandBuffer();
default:
- ERROR_LOG(OSHLE, "unimplemented MRC operation 0x%02X", operation);
+ ERROR_LOG(OSHLE, "unimplemented MRC instruction 0x%08X", instruction);
break;
}
return -1;
diff --git a/src/core/hle/coprocessor.h b/src/core/hle/coprocessor.h
index d6b9f162f..03822af13 100644
--- a/src/core/hle/coprocessor.h
+++ b/src/core/hle/coprocessor.h
@@ -8,13 +8,16 @@
namespace HLE {
-/// MRC operations (ARM register from coprocessor), decoded as instr[20:27]
-enum ARM11_MRC_OPERATION {
+/// Coprocessor operations
+enum CoprocessorOperation {
DATA_SYNCHRONIZATION_BARRIER = 0xE0,
CALL_GET_THREAD_COMMAND_BUFFER = 0xE1,
};
-/// Call an MRC operation in HLE
-u32 CallMRC(ARM11_MRC_OPERATION operation);
+/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
+s32 CallMCR(u32 instruction, u32 value);
+
+/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
+s32 CallMRC(u32 instruction);
} // namespace