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-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp8
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h3
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc2
-rw-r--r--src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp37
4 files changed, 4 insertions, 46 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index d2ac2acac..2e75208e6 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -147,14 +147,6 @@ void IREmitter::SetIndirectBranchVariable(const U32& value) {
Inst(Opcode::SetIndirectBranchVariable, value);
}
-U32 IREmitter::GetLoopSafetyVariable(u32 id) {
- return Inst<U32>(Opcode::GetLoopSafetyVariable, id);
-}
-
-void IREmitter::SetLoopSafetyVariable(u32 id, const U32& counter) {
- Inst(Opcode::SetLoopSafetyVariable, id, counter);
-}
-
U32 IREmitter::GetCbuf(const U32& binding, const U32& byte_offset) {
return Inst<U32>(Opcode::GetCbufU32, binding, byte_offset);
}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 7caab1f61..bb3500c54 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -55,9 +55,6 @@ public:
[[nodiscard]] U32 GetIndirectBranchVariable();
void SetIndirectBranchVariable(const U32& value);
- [[nodiscard]] U32 GetLoopSafetyVariable(u32 id);
- void SetLoopSafetyVariable(u32 id, const U32& counter);
-
[[nodiscard]] U32 GetCbuf(const U32& binding, const U32& byte_offset);
[[nodiscard]] Value GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
bool is_signed);
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index e87aeddd5..8a8d0d759 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -32,8 +32,6 @@ OPCODE(GetGotoVariable, U1, U32,
OPCODE(SetGotoVariable, Void, U32, U1, )
OPCODE(GetIndirectBranchVariable, U32, )
OPCODE(SetIndirectBranchVariable, Void, U32, )
-OPCODE(GetLoopSafetyVariable, U32, U32, )
-OPCODE(SetLoopSafetyVariable, Void, U32, U32, )
OPCODE(GetCbufU8, U32, U32, U32, )
OPCODE(GetCbufS8, U32, U32, U32, )
OPCODE(GetCbufU16, U32, U32, U32, )
diff --git a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
index 0fb870a69..10d05dc4c 100644
--- a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
+++ b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
@@ -15,7 +15,6 @@
#include <boost/intrusive/list.hpp>
-#include "common/settings.h"
#include "shader_recompiler/environment.h"
#include "shader_recompiler/frontend/ir/basic_block.h"
#include "shader_recompiler/frontend/ir/ir_emitter.h"
@@ -663,7 +662,7 @@ public:
Visit(root_stmt, nullptr, nullptr);
IR::Block& first_block{*syntax_list.front().data.block};
- IR::IREmitter ir = IR::IREmitter(first_block, first_block.begin());
+ IR::IREmitter ir(first_block, first_block.begin());
ir.Prologue();
}
@@ -741,27 +740,8 @@ private:
}
case StatementType::Loop: {
IR::Block* const loop_header_block{block_pool.Create(inst_pool)};
- const u32 this_loop_id{loop_id++};
-
- if (Settings::values.disable_shader_loop_safety_checks) {
- if (current_block) {
- current_block->AddBranch(loop_header_block);
- }
- } else {
- IR::Block* const init_block{block_pool.Create(inst_pool)};
- IR::IREmitter ir{*init_block};
-
- static constexpr u32 SAFETY_THRESHOLD = 0x1000;
- ir.SetLoopSafetyVariable(this_loop_id, ir.Imm32(SAFETY_THRESHOLD));
-
- if (current_block) {
- current_block->AddBranch(init_block);
- }
- init_block->AddBranch(loop_header_block);
-
- auto& init_node{syntax_list.emplace_back()};
- init_node.type = IR::AbstractSyntaxNode::Type::Block;
- init_node.data.block = init_block;
+ if (current_block) {
+ current_block->AddBranch(loop_header_block);
}
auto& header_node{syntax_list.emplace_back()};
header_node.type = IR::AbstractSyntaxNode::Type::Block;
@@ -779,16 +759,7 @@ private:
// The continue block is located at the end of the loop
IR::IREmitter ir{*continue_block};
- IR::U1 cond{VisitExpr(ir, *stmt.cond)};
- if (!Settings::values.disable_shader_loop_safety_checks) {
- const IR::U32 old_counter{ir.GetLoopSafetyVariable(this_loop_id)};
- const IR::U32 new_counter{ir.ISub(old_counter, ir.Imm32(1))};
- ir.SetLoopSafetyVariable(this_loop_id, new_counter);
-
- const IR::U1 safety_cond{ir.INotEqual(new_counter, ir.Imm32(0))};
- cond = ir.LogicalAnd(cond, safety_cond);
- }
- cond = ir.ConditionRef(cond);
+ const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
IR::Block* const body_block{syntax_list.at(body_block_index).data.block};
loop_header_block->AddBranch(body_block);